superio/nuvoton: Add support for Nuvoton NCT6776
Add support for both NCT6776D and NCT6776F devices. Change-Id: If6686ea0a1cd6be537e286699b4ee8f88ba8ad7c Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/5450 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
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@ -32,3 +32,7 @@ config SUPERIO_NUVOTON_NCT5104D
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config SUPERIO_NUVOTON_NCT5572D
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bool
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select SUPERIO_NUVOTON_COMMON_ROMSTAGE
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config SUPERIO_NUVOTON_NCT6776
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bool
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select SUPERIO_NUVOTON_COMMON_ROMSTAGE
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@ -23,3 +23,4 @@ romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
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subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
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subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
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subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5572D) += nct5572d
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subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6776) += nct6776
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@ -0,0 +1,22 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
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## Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6776) += superio.c
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@ -0,0 +1,62 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Both NCT6776D and NCT6776F package variants are supported. */
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#ifndef SUPERIO_NUVOTON_NCT6776_H
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#define SUPERIO_NUVOTON_NCT6776_H
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/* Logical Device Numbers (LDN). */
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#define NCT6776_FDC 0x00 /* Floppy */
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#define NCT6776_PP 0x01 /* Parallel port */
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#define NCT6776_SP1 0x02 /* Com1 */
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#define NCT6776_SP2 0x03 /* Com2 & IR */
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#define NCT6776_KBC 0x05 /* PS/2 keyboard and mouse */
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#define NCT6776_CIR 0x06
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#define NCT6776_GPIO6789_V 0x07
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#define NCT6776_WDT1_GPIO01A_V 0x08
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#define NCT6776_GPIO1234567_V 0x09
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#define NCT6776_ACPI 0x0A
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#define NCT6776_HWM_FPLED 0x0B /* Hardware monitor & front LED */
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#define NCT6776_VID 0x0D
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#define NCT6776_CIRWKUP 0x0E /* CIR wakeup */
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#define NCT6776_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */
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#define NCT6776_SVID 0x14
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#define NCT6776_DSLP 0x16 /* Deep sleep */
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#define NCT6776_GPIOA_LDN 0x17
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/* virtual LDN for GPIO and WDT */
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#define NCT6776_WDT1 ((0 << 8) | NCT6776_WDT1_GPIO01A_V)
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#define NCT6776_GPIOBASE ((0 << 8) | NCT6776_WDT1_GPIO01A_V) //?
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#define NCT6776_GPIO0 ((1 << 8) | NCT6776_WDT1_GPIO01A_V)
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#define NCT6776_GPIO1 ((1 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO2 ((2 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO3 ((3 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO4 ((4 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO5 ((5 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO6 ((6 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO7 ((7 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO8 ((0 << 8) | NCT6776_GPIO6789_V)
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#define NCT6776_GPIO9 ((1 << 8) | NCT6776_GPIO6789_V)
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#define NCT6776_GPIOA ((2 << 8) | NCT6776_WDT1_GPIO01A_V)
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#endif /* SUPERIO_NUVOTON_NCT6776_H */
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@ -0,0 +1,94 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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* Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <pc80/keyboard.h>
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#include <stdlib.h>
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#include <superio/conf_mode.h>
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#include "nct6776.h"
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/* Both NCT6776D and NCT6776F package variants are supported. */
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static void nct6776_init(struct device *dev)
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{
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if (!dev->enabled)
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return;
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switch(dev->path.pnp.device) {
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/* TODO: Might potentially need code for HWM or FDC etc. */
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case NCT6776_KBC:
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pc_keyboard_init();
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break;
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_alt_enable,
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.init = nct6776_init,
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.ops_pnp_mode = &pnp_conf_mode_8787_aa,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, NCT6776_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, },
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{ &ops, NCT6776_CIR, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_ACPI},
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{ &ops, NCT6776_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ffe, 0}, {0x0ffe, 4}, },
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{ &ops, NCT6776_VID},
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{ &ops, NCT6776_CIRWKUP, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_GPIO_PP_OD},
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{ &ops, NCT6776_SVID},
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{ &ops, NCT6776_DSLP},
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{ &ops, NCT6776_GPIOA_LDN},
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{ &ops, NCT6776_WDT1},
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{ &ops, NCT6776_GPIOBASE, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
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{ &ops, NCT6776_GPIO0},
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{ &ops, NCT6776_GPIO1},
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{ &ops, NCT6776_GPIO2},
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{ &ops, NCT6776_GPIO3},
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{ &ops, NCT6776_GPIO4},
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{ &ops, NCT6776_GPIO5},
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{ &ops, NCT6776_GPIO6},
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{ &ops, NCT6776_GPIO7},
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{ &ops, NCT6776_GPIO8},
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{ &ops, NCT6776_GPIO9},
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{ &ops, NCT6776_GPIOA},
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_nuvoton_nct6776_ops = {
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CHIP_NAME("NUVOTON NCT6776 Super I/O")
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.enable_dev = enable_dev,
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};
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