From 1e45295236affdb54f3bd470573423ac54aabb52 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 18 May 2023 10:56:10 +0200 Subject: [PATCH] vc/amd/pi/amdlib.c: Use native coreboot code over compiler builtins MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Compiler builtins depend on certain CPU features flags to be passed to the compiler. This may have unwanted side effects as generating code with FPU registers. Instead use native coreboot code. Signed-off-by: Arthur Heymans Change-Id: I4e92d103fa3a6c7a56e813a583b3262676969669 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75321 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Felix Held --- src/vendorcode/amd/pi/Lib/amdlib.c | 6 ++++-- src/vendorcode/amd/pi/Makefile.inc | 1 - 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/vendorcode/amd/pi/Lib/amdlib.c b/src/vendorcode/amd/pi/Lib/amdlib.c index cc742301d6..ec3b53b017 100644 --- a/src/vendorcode/amd/pi/Lib/amdlib.c +++ b/src/vendorcode/amd/pi/Lib/amdlib.c @@ -45,6 +45,8 @@ #include #include +#include +#include #include #include #include @@ -488,8 +490,8 @@ LibAmdCLFlush ( address32 = 0; hwcrSave = SetFsBase (Address); for (Index = 0; Index < Count; Index++){ - _mm_mfence (); - _mm_clflush_fs (&address32 [Index * 64]); + mfence(); + clflush(&address32 [Index * 64]); } RestoreHwcr (hwcrSave); } diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index e62abab9cd..b00e38b2e8 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -88,7 +88,6 @@ AGESA_INC += -I$(src)/commonlib/include AGESA_INC += -I$(src)/commonlib/bsd/include AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include -AGESA_CFLAGS += -march=amdfam10 -mno-3dnow AGESA_CFLAGS += -Wno-pragma-pack AGESA_CFLAGS += -fno-strict-aliasing -D__LIBAGESA__ CFLAGS_x86_32 += $(AGESA_CFLAGS)