drivers/tpm/cr50: Add I2C bus support to cr50 driver
This allows mainboards using an I2C bus to communicate with the cr50 to reuse the functionality related to firmware version and BOARD_CFG. BUG=b:202246591 TEST=boot on brya0, see cr50 FW version in logs Change-Id: Ide1a7299936193da3cd3d15fdfd1a80994d70da0 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -17,14 +17,15 @@
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#include <commonlib/endian.h>
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#include <commonlib/helpers.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/i2c_simple.h>
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#include <drivers/tpm/cr50.h>
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#include <endian.h>
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#include <security/tpm/tis.h>
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#include <string.h>
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#include <types.h>
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#include <delay.h>
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#include <console/console.h>
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#include <device/i2c_simple.h>
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#include <endian.h>
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#include <timer.h>
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#include <security/tpm/tis.h>
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#include "tpm.h"
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@ -126,7 +127,7 @@ static int cr50_i2c_read(uint8_t addr, uint8_t *buffer, size_t len)
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*
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* Returns -1 on error, 0 on success.
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*/
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static int cr50_i2c_write(uint8_t addr, uint8_t *buffer, size_t len)
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static int cr50_i2c_write(uint8_t addr, const uint8_t *buffer, size_t len)
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{
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if (tpm_dev.addr == 0)
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return -1;
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@ -473,6 +474,7 @@ static int cr50_i2c_probe(struct tpm_chip *chip, uint32_t *did_vid)
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int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr)
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{
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struct cr50_firmware_version ver;
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uint32_t did_vid = 0;
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if (dev_addr == 0) {
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@ -498,6 +500,12 @@ int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr)
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printk(BIOS_DEBUG, "cr50 TPM 2.0 (i2c %u:0x%02x id 0x%x)\n",
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bus, dev_addr, did_vid >> 16);
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if (tpm_first_access_this_boot()) {
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/* This is called for the side-effect of printing the version string. */
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cr50_get_firmware_version(&ver);
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cr50_set_board_cfg();
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}
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chip->is_open = 1;
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return 0;
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}
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@ -505,3 +513,13 @@ int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr)
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void tpm_vendor_cleanup(struct tpm_chip *chip)
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{
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}
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cb_err_t tis_vendor_write(unsigned int addr, const void *buffer, size_t bytes)
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{
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return cr50_i2c_write(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS;
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}
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cb_err_t tis_vendor_read(unsigned int addr, void *buffer, size_t bytes)
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{
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return cr50_i2c_read(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS;
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}
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@ -23,6 +23,9 @@ enum cr50_register {
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#define CR50_FW_VER_REG_SPI (TPM_LOCALITY_0_SPI_BASE + 0xf90)
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#define CR50_BOARD_CFG_REG_SPI (TPM_LOCALITY_0_SPI_BASE + 0xfe0)
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#define CR50_FW_VER_REG_I2C 0x0f
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#define CR50_BOARD_CFG_REG_I2C 0x1c
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/* Return register address, which depends on the bus type, or -1 for error. */
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static int get_reg_addr(enum cr50_register reg)
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{
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@ -37,6 +40,16 @@ static int get_reg_addr(enum cr50_register reg)
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}
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}
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if (CONFIG(I2C_TPM)) {
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switch (reg) {
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case CR50_FW_VER_REG:
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return CR50_FW_VER_REG_I2C;
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case CR50_BOARD_CFG_REG:
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return CR50_BOARD_CFG_REG_I2C;
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default:
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return -1;
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}
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}
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return -1;
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}
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