drivers/tpm/cr50: Add I2C bus support to cr50 driver

This allows mainboards using an I2C bus to communicate with the cr50
to reuse the functionality related to firmware version and BOARD_CFG.

BUG=b:202246591
TEST=boot on brya0, see cr50 FW version in logs

Change-Id: Ide1a7299936193da3cd3d15fdfd1a80994d70da0
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/drivers/i2c/tpm/cr50.c

@@ -17,14 +17,15 @@
 
 #include <commonlib/endian.h>
 #include <commonlib/helpers.h>
+#include <console/console.h>
+#include <delay.h>
+#include <device/i2c_simple.h>
+#include <drivers/tpm/cr50.h>
+#include <endian.h>
+#include <security/tpm/tis.h>
 #include <string.h>
 #include <types.h>
-#include <delay.h>
-#include <console/console.h>
-#include <device/i2c_simple.h>
-#include <endian.h>
 #include <timer.h>
-#include <security/tpm/tis.h>
 
 #include "tpm.h"
 
@@ -126,7 +127,7 @@ static int cr50_i2c_read(uint8_t addr, uint8_t *buffer, size_t len)
  *
  * Returns -1 on error, 0 on success.
  */
-static int cr50_i2c_write(uint8_t addr, uint8_t *buffer, size_t len)
+static int cr50_i2c_write(uint8_t addr, const uint8_t *buffer, size_t len)
 {
 	if (tpm_dev.addr == 0)
 		return -1;
@@ -473,6 +474,7 @@ static int cr50_i2c_probe(struct tpm_chip *chip, uint32_t *did_vid)
 
 int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr)
 {
+	struct cr50_firmware_version ver;
 	uint32_t did_vid = 0;
 
 	if (dev_addr == 0) {
@@ -498,6 +500,12 @@ int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr)
 	printk(BIOS_DEBUG, "cr50 TPM 2.0 (i2c %u:0x%02x id 0x%x)\n",
 	       bus, dev_addr, did_vid >> 16);
 
+	if (tpm_first_access_this_boot()) {
+		/* This is called for the side-effect of printing the version string. */
+		cr50_get_firmware_version(&ver);
+		cr50_set_board_cfg();
+	}
+
 	chip->is_open = 1;
 	return 0;
 }
@@ -505,3 +513,13 @@ int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr)
 void tpm_vendor_cleanup(struct tpm_chip *chip)
 {
 }
+
+cb_err_t tis_vendor_write(unsigned int addr, const void *buffer, size_t bytes)
+{
+	return cr50_i2c_write(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS;
+}
+
+cb_err_t tis_vendor_read(unsigned int addr, void *buffer, size_t bytes)
+{
+	return cr50_i2c_read(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS;
+}

src/drivers/tpm/cr50.c

@@ -23,6 +23,9 @@ enum cr50_register {
 #define CR50_FW_VER_REG_SPI		(TPM_LOCALITY_0_SPI_BASE + 0xf90)
 #define CR50_BOARD_CFG_REG_SPI		(TPM_LOCALITY_0_SPI_BASE + 0xfe0)
 
+#define CR50_FW_VER_REG_I2C		0x0f
+#define CR50_BOARD_CFG_REG_I2C		0x1c
+
 /* Return register address, which depends on the bus type, or -1 for error. */
 static int get_reg_addr(enum cr50_register reg)
 {
@@ -37,6 +40,16 @@ static int get_reg_addr(enum cr50_register reg)
 		}
 	}
 
+	if (CONFIG(I2C_TPM)) {
+		switch (reg) {
+		case CR50_FW_VER_REG:
+			return CR50_FW_VER_REG_I2C;
+		case CR50_BOARD_CFG_REG:
+			return CR50_BOARD_CFG_REG_I2C;
+		default:
+			return -1;
+		}
+	}
 
 	return -1;
 }