From 1e638ba27ca3ef6d9ddf204af036744ab90873df Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Thu, 8 Dec 2022 11:40:02 +0530 Subject: [PATCH] soc/intel/meteorlake/romstage: Rewrite the if condition The patch rewrites `if` condition by connecting two different conditions using the logical and(&&) operator without changing the semantics to improve the code readability. TEST=Build the code for Rex Signed-off-by: Sridhar Siricilla Change-Id: I8c912f694d801768b1553f33de78f01215be7f0f Reviewed-on: https://review.coreboot.org/c/coreboot/+/70479 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Ravishankar Sarawadi --- src/soc/intel/meteorlake/romstage/romstage.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/soc/intel/meteorlake/romstage/romstage.c b/src/soc/intel/meteorlake/romstage/romstage.c index ba0079ca09..35f9368b5a 100644 --- a/src/soc/intel/meteorlake/romstage/romstage.c +++ b/src/soc/intel/meteorlake/romstage/romstage.c @@ -130,12 +130,10 @@ void mainboard_romstage_entry(void) cse_init(HECI1_BASE_ADDRESS); s3wake = pmc_fill_power_state(ps) == ACPI_S3; - if (!s3wake) { - if (CONFIG(SOC_INTEL_CSE_LITE_SKU)) { - timestamp_add_now(TS_CSE_FW_SYNC_START); - cse_fw_sync(); - timestamp_add_now(TS_CSE_FW_SYNC_END); - } + if (!s3wake && CONFIG(SOC_INTEL_CSE_LITE_SKU)) { + timestamp_add_now(TS_CSE_FW_SYNC_START); + cse_fw_sync(); + timestamp_add_now(TS_CSE_FW_SYNC_END); } /*