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siemens/mc_apl1: Activate clock spreading for PTN3460 

In order to minimize Electromagnetic Interference (EMI) on the LVDS
interface driven by PTN3460, clock spreading must be activated for
mc_apl1 mainboard. The modulation ratio is set to 1 % of the nominal
frequency.

Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28761
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mario Scheithauer 2018-09-27 11:51:23 +02:00 committed by Werner Zeh
parent 15d8405584
commit 1e67f0773b
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c
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@ -84,8 +84,8 @@ int ptn3460_init(const char *hwi_block)
/* Use 18 bits per pixel. */ /* Use 18 bits per pixel. */
cfg.lvds_interface_ctrl1 |= 0x20; cfg.lvds_interface_ctrl1 |= 0x20;
/* No clock spreading, 300 mV LVDS swing. */ /* 1 % clock spreading, 300 mV LVDS swing. */
cfg.lvds_interface_ctrl2 = 0x03; cfg.lvds_interface_ctrl2 = 0x13;
/* No LVDS signal swap. */ /* No LVDS signal swap. */
cfg.lvds_interface_ctrl3 = 0x00; cfg.lvds_interface_ctrl3 = 0x00;
/* Delay T2 (VDD to LVDS active) by 16 ms. */ /* Delay T2 (VDD to LVDS active) by 16 ms. */