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nb/amd/agesa/family15tn: define macros for GNB and IOMMU devices 

Follow the example of newer AMD code for Stoneyridge and Picasso.

Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I9c17d4cb4953b28a47483f5d7db308ccc89e9281
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Mike Banon 2020-11-21 21:58:50 +03:00 committed by Felix Held
parent 58d0336ef3
commit 1e6a227f10
1 changed files with 10 additions and 0 deletions
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10
src/northbridge/amd/agesa/family15tn/pci_devs.h
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@ -7,6 +7,16 @@
#define BUS0 0
/* GNB Root Complex */
#define GNB_DEV 0x0
#define GNB_FUNC 0
#define GNB_DEVFN PCI_DEVFN(GNB_DEV, GNB_FUNC)
/* IOMMU */
#define IOMMU_DEV 0x0
#define IOMMU_FUNC 2
#define IOMMU_DEVFN PCI_DEVFN(IOMMU_DEV, IOMMU_FUNC)
/* Graphics and Display */
#define GFX_DEV 0x1
#define GFX_FUNC 0