From 1eae3eed293b0e781efec68840eb80749baa5ede Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 30 Oct 2013 17:08:59 -0500 Subject: [PATCH] baytrail: allow function disable on TXE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previously it was not known how to put the TXE pci device into D3Hot. It's been disseminated that this is not a requirement for disabling the TXE pci device in the function disable register. Therefore, allow this by returning 0 from place_device_in_d3hot(). BUG=chrome-os-partner:22871 BRANCH=None TEST=Temporarily set TXE to be disabled. Noted FUNC_DIS was being set accordingly. Change-Id: Ibf537bf8ba718859591dc89bdf41e57c1ea9d836 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/175490 Reviewed-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/4925 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/intel/baytrail/southcluster.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index eacabf3098..42349fac4e 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -322,7 +322,8 @@ static int place_device_in_d3hot(device_t dev) offset = 0x50; break; case PCI_DEVFN(TXE_DEV, TXE_FUNC): - break; + /* TXE cannot be placed in D3Hot. */ + return 0; case PCI_DEVFN(PCIE_PORT1_DEV, PCIE_PORT1_FUNC): offset = 0xa0; break;