mb/google/brask/var/constitution: update gpio settings
Update GPP_E12,GPP_E13,GPP_H19 in ramstage. Update GPP_F11 in bootblock. TEST=emerge-brask coreboot Change-Id: Icdca7f574282da140ec64cea9cdda3ebccbe3eb8 Signed-off-by: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73194 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Pablo Ceballos <pceballos@google.com> Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -53,9 +53,9 @@ static const struct pad_config override_gpio_table[] = {
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/* E2 : THC0_SPI1_IO3 ==> LAN_I350_WAKE# */
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PAD_CFG_GPI_IRQ_WAKE(GPP_E2, NONE, DEEP, LEVEL, INVERT),
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/* E12 : THC0_SPI1_IO1 ==> TPU_RST_PIN40 */
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PAD_CFG_GPO(GPP_E12, 0, DEEP),
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PAD_CFG_GPO(GPP_E12, 1, DEEP),
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/* E13 : THC0_SPI1_IO2 ==> TPU_RST_PIN42 */
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PAD_CFG_GPO(GPP_E13, 0, DEEP),
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PAD_CFG_GPO(GPP_E13, 1, DEEP),
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/* E14 : DDSP_HPDA ==> HDMIA_HPD */
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PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
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/* E20 : DDP2_CTRLCLK ==> HDMIA_CTRLCLK */
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@ -83,7 +83,7 @@ static const struct pad_config override_gpio_table[] = {
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/* H13 : I2C7_SCL ==> PCH_I2C_U3A1_SCL */
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PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1),
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/* H19 : SRCCLKREQ4# ==> M2_TPU1_CLKREQ_ODL */
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PAD_CFG_GPI_IRQ_WAKE(GPP_H19, NONE, DEEP, LEVEL, INVERT),
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PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
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/* R0 : HDA_BCLK ==> NC */
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PAD_NC_LOCK(GPP_R0, NONE, LOCK_CONFIG),
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@ -111,6 +111,8 @@ static const struct pad_config early_gpio_table[] = {
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PAD_CFG_GPO(GPP_B4, 0, DEEP),
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/* E15 : RSVD_TP ==> PCH_WP_OD */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP),
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/* F11 : THC0_SPI1_CLK ==> MEM_CH_SEL */
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PAD_CFG_GPI(GPP_F11, NONE, DEEP),
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/* F14 : GSXDIN ==> EN_PP3300_SSD */
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PAD_CFG_GPO(GPP_F14, 1, DEEP),
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/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
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