Add support for the Winbond W83627DHG Super I/O.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3746 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2008-11-11 21:10:07 +00:00
parent 81af3d4a00
commit 1ec5094390
5 changed files with 253 additions and 0 deletions

View File

@ -0,0 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

View File

@ -0,0 +1,29 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <pc80/keyboard.h>
#include <uart8250.h>
extern struct chip_operations superio_winbond_w83627dhg_ops;
struct superio_winbond_w83627dhg_config {
struct uart8250 com1, com2;
struct pc_keyboard keyboard;
};

View File

@ -0,0 +1,123 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <uart8250.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include "chip.h"
#include "w83627dhg.h"
static void pnp_enter_ext_func_mode(device_t dev)
{
outb(0x87, dev->path.u.pnp.port);
outb(0x87, dev->path.u.pnp.port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.u.pnp.port);
}
static void w83627dhg_init(device_t dev)
{
struct superio_winbond_w83627dhg_config *conf;
struct resource *res0, *res1;
if (!dev->enabled)
return;
conf = dev->chip_info;
switch(dev->path.u.pnp.device) {
case W83627DHG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
case W83627DHG_SP2:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
case W83627DHG_KBC:
res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1);
init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
break;
}
}
void w83627dhg_pnp_set_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_set_resources(dev);
pnp_exit_ext_func_mode(dev);
}
void w83627dhg_pnp_enable_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
pnp_exit_ext_func_mode(dev);
}
void w83627dhg_pnp_enable(device_t dev)
{
if (!dev->enabled)
return;
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_exit_ext_func_mode(dev);
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = w83627dhg_pnp_set_resources,
.enable_resources = w83627dhg_pnp_enable_resources,
.enable = w83627dhg_pnp_enable,
.init = w83627dhg_init,
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x0ff8, 0}, },
{ &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x0ff8, 0}, },
{ &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
{ &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
{ &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0xfff, 0 }, { 0xfff, 0x4}, },
{ &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, },
{ &ops, W83627DHG_GPIO6, },
{ &ops, W83627DHG_WDTO_PLED, },
{ &ops, W83627DHG_GPIO2345, },
{ &ops, W83627DHG_ACPI, },
{ &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, { 0xffe, 0 }, },
{ &ops, W83627DHG_PECI_SST, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627dhg_ops = {
CHIP_NAME("Winbond W83627DHG Super I/O")
.enable_dev = enable_dev,
};

View File

@ -0,0 +1,32 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define W83627DHG_FDC 0 /* Floppy */
#define W83627DHG_PP 1 /* Parallel port */
#define W83627DHG_SP1 2 /* Com1 */
#define W83627DHG_SP2 3 /* Com2 */
#define W83627DHG_KBC 5 /* PS/2 keyboard + mouse */
#define W83627DHG_SPI 6 /* Serial peripheral interface */
#define W83627DHG_GPIO6 7 /* GPIO6 */
#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
#define W83627DHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */
#define W83627DHG_ACPI 10 /* ACPI */
#define W83627DHG_HWM 11 /* Hardware monitor */
#define W83627DHG_PECI_SST 12 /* PECI, SST */

View File

@ -0,0 +1,46 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include <stdint.h>
#include "w83627dhg.h"
static void pnp_enter_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
}
static void w83627dhg_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
pnp_exit_ext_func_mode(dev);
}