mb/google/brya: Add 5G WWAN ACPI support for Brya and Redrix
Add FM350GL 5G WWAN support using drivers/wwan/fm and addtional PM features from RTD3. Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I6413f106ce6ef6c895d4861f4dbe26ac9a507d25 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61355 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -18,6 +18,7 @@ config BOARD_GOOGLE_BRYA_COMMON
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select DRIVERS_SOUNDWIRE_MAX98373
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select DRIVERS_SOUNDWIRE_MAX98373
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select DRIVERS_SPI_ACPI
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select DRIVERS_SPI_ACPI
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select DRIVERS_WIFI_GENERIC
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select DRIVERS_WIFI_GENERIC
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select DRIVERS_WWAN_FM350GL
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_GOOGLE_CHROMEEC_ESPI
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select EC_GOOGLE_CHROMEEC_ESPI
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@ -154,8 +154,12 @@ chip soc/intel/alderlake
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# Enable WWAN PCIE 6 using clk 5
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# Enable WWAN PCIE 6 using clk 5
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chip soc/intel/common/block/pcie/rtd3
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chip soc/intel/common/block/pcie/rtd3
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
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register "reset_off_delay_ms" = "20"
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register "reset_delay_ms" = "1000"
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register "srcclk_pin" = "5"
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register "srcclk_pin" = "5"
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device generic 0 on end
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register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
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register "skip_on_off_support" = "true"
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device generic 0 alias rp6_rtd3 on end
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end
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end
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register "pch_pcie_rp[PCH_RP(6)]" = "{
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register "pch_pcie_rp[PCH_RP(6)]" = "{
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.clk_src = 5,
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.clk_src = 5,
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@ -192,6 +192,17 @@ chip soc/intel/alderlake
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end
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end
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device ref pcie_rp6 on
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device ref pcie_rp6 on
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probe DB_LTE LTE_PCIE
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probe DB_LTE LTE_PCIE
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chip drivers/wwan/fm
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register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
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register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
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register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
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use rp6_rtd3 as rtd3dev
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device generic 0 on
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probe DB_LTE LTE_PCIE
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end
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end
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end
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end
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device ref tcss_dma0 on
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device ref tcss_dma0 on
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chip drivers/intel/usb4/retimer
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chip drivers/intel/usb4/retimer
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@ -189,6 +189,16 @@ chip soc/intel/alderlake
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end
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end
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device ref pcie_rp6 on
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device ref pcie_rp6 on
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probe DB_LTE LTE_PCIE
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probe DB_LTE LTE_PCIE
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chip drivers/wwan/fm
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register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
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register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
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register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
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use rp6_rtd3 as rtd3dev
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device generic 0 on
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probe DB_LTE LTE_PCIE
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end
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end
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end
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end
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device ref tcss_dma0 on
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device ref tcss_dma0 on
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chip drivers/intel/usb4/retimer
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chip drivers/intel/usb4/retimer
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@ -167,6 +167,16 @@ chip soc/intel/alderlake
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end
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end
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device ref pcie_rp6 on
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device ref pcie_rp6 on
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probe DB_LTE LTE_PCIE
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probe DB_LTE LTE_PCIE
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chip drivers/wwan/fm
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register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
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register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
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register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
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use rp6_rtd3 as rtd3dev
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device generic 0 on
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probe DB_LTE LTE_PCIE
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end
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end
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end
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end
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device ref tcss_dma0 on
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device ref tcss_dma0 on
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chip drivers/intel/usb4/retimer
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chip drivers/intel/usb4/retimer
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@ -153,6 +153,16 @@ chip soc/intel/alderlake
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end
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end
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device ref pcie_rp6 on
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device ref pcie_rp6 on
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probe DB_LTE LTE_PCIE
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probe DB_LTE LTE_PCIE
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chip drivers/wwan/fm
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register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
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register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
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register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
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use rp6_rtd3 as rtd3dev
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device generic 0 on
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probe DB_LTE LTE_PCIE
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end
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end
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end
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end
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device ref tcss_dma0 on
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device ref tcss_dma0 on
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chip drivers/intel/usb4/retimer
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chip drivers/intel/usb4/retimer
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