From 1f19ef54e43f791350ac36b3004a0f2f80fa9227 Mon Sep 17 00:00:00 2001 From: Sathya Prakash M R Date: Mon, 12 Jul 2021 16:30:37 +0530 Subject: [PATCH] mb/intel/adlrvp: Use HDA TMODE 8T to match spec for ADL P RVP With current setting Display audio codec probe fails. Hence HDMI/DP audio fails. Earlier, with FSP 2037 was used the mode was incorrectly programmed to 4T This setting was carried ahead with below change: Commit : 50f8b4ebdd7db8077b87ab7686637599c9d93af3 The issue was fixed in later FSPs and with current FSP v2237, we need to set the TMODE to 8T as per spec. TEST=Verify HDMI/DP Playback on ADL P RVP Fixes: 50f8b4ebdd7db8077b87ab7686637599c9d93af3 (soc/intel/alderlake: Add enum for HDA audio configuration) Signed-off-by: Sathya Prakash M R Change-Id: Ia39a33f5da2fea0dc2eaf4eae45999a711c61c33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56208 Reviewed-by: Subrata Banik Reviewed-by: Balaji Manigandan Reviewed-by: Meera Ravindranath Tested-by: build bot (Jenkins) --- src/mainboard/intel/adlrvp/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index d4a2eb72cf..c9d7da6cbc 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -169,7 +169,7 @@ chip soc/intel/alderlake # HD Audio register "PchHdaDspEnable" = "1" - register "PchHdaIDispLinkTmode" = "HDA_TMODE_4T" + register "PchHdaIDispLinkTmode" = "HDA_TMODE_8T" register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" register "PchHdaIDispCodecEnable" = "1"