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soc/intel/skylake: Set proper defaults in chipset devicetree 

LPC, P2SB and Power Management controller are always needed. Thus,
enable them by default.

Change-Id: I20b8cbe536da70fccc3d11e1eedf4a5e14bfc862
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Felix Singer 2021-05-07 21:25:17 +02:00 committed by Felix Held
parent 4caa05e4ce
commit 1f44efc202
1 changed files with 3 additions and 3 deletions
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6
src/soc/intel/skylake/chipset.cb
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@ -59,9 +59,9 @@ chip soc/intel/skylake
device pci 1e.4 alias emmc off end # EMMC
device pci 1e.5 alias sdio off end # SDIO
device pci 1e.6 alias sdxc off end # SDXC
device pci 1f.0 alias lpc_espi off end # LPC Interface
device pci 1f.1 alias p2sb off end # P2SB
device pci 1f.2 alias pmc off end # Power Management Controller
device pci 1f.0 alias lpc_espi on end # LPC Interface
device pci 1f.1 alias p2sb on end # P2SB
device pci 1f.2 alias pmc on end # Power Management Controller
device pci 1f.3 alias hda off end # Intel HDA
device pci 1f.4 alias smbus off end # SMBus
device pci 1f.5 alias fast_spi off end # PCH SPI