soc/intel/common: Add common Intel timer code

Add common timer code to get tsc frequency(Mhz).

Change-Id: Ifd4b24735c74c636348fc32afbcc267e384cb610
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/common/block/timer/Kconfig

@@ -0,0 +1,4 @@
+config SOC_INTEL_COMMON_BLOCK_TIMER
+	bool
+	help
+	  Intel Processor common TIMER support

src/soc/intel/common/block/timer/Makefile.inc

@@ -0,0 +1,6 @@
+bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
+verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
+smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
+postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c

src/soc/intel/common/block/timer/timer.c

@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/msr.h>
+#include <cpu/x86/tsc.h>
+#include <intelblocks/msr.h>
+
+unsigned long tsc_freq_mhz(void)
+{
+	msr_t msr = rdmsr(MSR_PLATFORM_INFO);
+	return (CONFIG_CPU_BCLK_MHZ * ((msr.lo >> 8) & 0xff));
+}