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C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA 

Currently the C32 has some legacy boards which use the old C32 code. We need to seperate them.
CONFIG_CPU_AMD_SOCKET_C32 was used in legacy code before.
But it is not a good idea, so we change the code as follows:
So we use CONFIG_CPU_AMD_SOCKET_C32 to identify mainboard which uses agesa code,
and use  CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA to identify mainboard which uses legacy code.

Change-Id: If6114bf8912e78b7732f25a1adfb2e4d8eb10ee4
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/1497
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Siyuan Wang 2012-09-07 18:35:17 +08:00 committed by Marc Jones
parent fec5b647fc
commit 1fb49dfa5e
3 changed files with 9 additions and 9 deletions
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2
src/cpu/amd/Makefile.inc
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@ -7,7 +7,7 @@ subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2
subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2R2) += socket_AM2r2
subdirs-$(CONFIG_CPU_AMD_SOCKET_AM3) += socket_AM3
subdirs-$(CONFIG_CPU_AMD_SOCKET_ASB2) += socket_ASB2
subdirs-$(CONFIG_CPU_AMD_SOCKET_C32) += socket_C32
subdirs-$(CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA) += socket_C32
subdirs-$(CONFIG_CPU_AMD_GEODE_GX1) += geode_gx1
subdirs-$(CONFIG_CPU_AMD_GEODE_GX2) += geode_gx2
subdirs-$(CONFIG_CPU_AMD_GEODE_LX) += geode_lx

14
src/cpu/amd/socket_C32/Kconfig
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@ -1,4 +1,4 @@
config CPU_AMD_SOCKET_C32
config CPU_AMD_SOCKET_C32_NON_AGESA
bool
select CPU_AMD_MODEL_10XXX
select HT3_SUPPORT
@ -8,30 +8,30 @@ config CPU_AMD_SOCKET_C32
config CPU_SOCKET_TYPE
hex
default 0x14
depends on CPU_AMD_SOCKET_C32
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config EXT_RT_TBL_SUPPORT
bool
default n
depends on CPU_AMD_SOCKET_C32
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config EXT_CONF_SUPPORT
bool
default n
depends on CPU_AMD_SOCKET_C32
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config CBB
hex
default 0x0
depends on CPU_AMD_SOCKET_C32
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config CDB
hex
default 0x18
depends on CPU_AMD_SOCKET_C32
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config XIP_ROM_SIZE
hex
default 0x80000
depends on CPU_AMD_SOCKET_C32
depends on CPU_AMD_SOCKET_C32_NON_AGESA

2
src/mainboard/supermicro/h8scm_fam10/Kconfig
View File

@ -3,7 +3,7 @@ if BOARD_SUPERMICRO_H8SCM_FAM10
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_AMD_SOCKET_C32
select CPU_AMD_SOCKET_C32_NON_AGESA
select DIMM_DDR3
select DIMM_REGISTERED
select NORTHBRIDGE_AMD_AMDFAM10