diff --git a/src/console/post.c b/src/console/post.c
index ab1afcf50a..a565c6bcfb 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -22,6 +22,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <pc80/mc146818rtc.h>
+#include <elog.h>
 
 /* Write POST information */
 
@@ -40,6 +41,41 @@ void __attribute__((weak)) mainboard_post(uint8_t value)
 #endif
 
 #if CONFIG_CMOS_POST
+
+#if !defined(__PRE_RAM__)
+void cmos_post_log(void)
+{
+	u8 code;
+
+	/* Get post code from other bank */
+	switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
+	case CMOS_POST_BANK_0_MAGIC:
+		code = cmos_read(CMOS_POST_BANK_1_OFFSET);
+		break;
+	case CMOS_POST_BANK_1_MAGIC:
+		code = cmos_read(CMOS_POST_BANK_0_OFFSET);
+		break;
+	default:
+		return;
+	}
+
+	/* Check last post code in previous boot against normal list */
+	switch (code) {
+	case POST_OS_BOOT:
+	case POST_OS_RESUME:
+	case POST_ENTER_ELF_BOOT:
+	case 0:
+		break;
+	default:
+		printk(BIOS_WARNING, "POST: Unexpected post code "
+		       "in previous boot: 0x%02x\n", code);
+#if CONFIG_ELOG
+		elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
+#endif
+	}
+}
+#endif /* !__PRE_RAM__ */
+
 static void cmos_post_code(u8 value)
 {
 	switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index 748adafcf3..2f6beefd3f 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -813,6 +813,11 @@ int elog_init(void)
 		elog_add_event_dword(ELOG_TYPE_BOOT, boot_count_read());
 #endif
 
+#if CONFIG_CMOS_POST && !defined(__SMM__)
+	/* Check and log POST codes from previous boot */
+	cmos_post_log();
+#endif
+
 	return 0;
 }
 
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index edc3241e42..f0d58d82d6 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -175,6 +175,10 @@ static inline int get_option(void *dest __attribute__((unused)),
 #define CMOS_POST_BANK_0_OFFSET   (CMOS_POST_OFFSET + 1)
 #define CMOS_POST_BANK_1_MAGIC    0x81
 #define CMOS_POST_BANK_1_OFFSET   (CMOS_POST_OFFSET + 2)
+
+#if !defined(__ROMCC__)
+void cmos_post_log(void);
+#endif
 #endif /* CONFIG_CMOS_POST */
 
 #endif /*  PC80_MC146818RTC_H */