google/lars: SPD change for Proto board
Update Memory ID for Proto board Update detection of single/dual channel memory to use SPD Index (Memory ID) Remove boardid.h as it is no longer needed BUG=None BRANCH=None TEST=Build and Boot Lars (Proto) Change-Id: I100b0fec4bf555c261e30140109cb0f36576130c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 24a4fddf4f1a4441fca8783cfa451e220ff986d8 Original-Change-Id: I636e881cb3fb9a0056edea2bc34a861a59b91c8f Original-Signed-off-by: David Wu <David_Wu@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/313903 Original-Commit-Ready: David Wu <david_wu@quantatw.com> Original-Tested-by: David Wu <david_wu@quantatw.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/12593 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -1,27 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*/
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#ifndef _BOARDID_H_
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#define _BOARDID_H_
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#define SCRD_SKU1 0x3
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#define SCRD_SKU2 0x4
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#define SCRD_SKU3 0x1
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#define SCRD_SKU4 0x2
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#define SCRD_SKU5 0x5
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#define SCRD_SKU6 0x6
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#endif
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@ -18,10 +18,10 @@ romstage-y += spd.c
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SPD_BIN = $(obj)/spd.bin
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SPD_SOURCES = hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866 # 0b0000
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SPD_SOURCES += hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866 # 0b0001
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SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF-1G-1866 # 0b0010
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SPD_SOURCES += samsung_dimm_K4E6E304EB-EGCF-2G-1866 # 0b0011
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SPD_SOURCES = hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866 # 0b0000 Single Channel 2GB
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SPD_SOURCES += hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866 # 0b0001 Dual Channel 8GB
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SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF-1G-1866 # 0b0010 Dual Channel 4GB
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SPD_SOURCES += empty # 0b0011
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SPD_SOURCES += empty # 0b0100
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SPD_SOURCES += empty # 0b0101
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SPD_SOURCES += empty # 0b0110
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@ -15,14 +15,12 @@
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*/
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#include <arch/byteorder.h>
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#include <boardid.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <soc/pei_data.h>
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#include <soc/romstage.h>
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#include <string.h>
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#include "../boardid.h"
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#include "spd.h"
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static void mainboard_print_spd_info(uint8_t spd[])
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@ -81,17 +79,11 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
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{
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char *spd_file;
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size_t spd_file_len;
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int spd_index, sku_id;
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int spd_index, spd_span;
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spd_index = pei_data->mem_cfg_id;
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/*
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* XXX: This is incorrect usage.The Board ID should be the revision ID
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* and not SKU ID but on SCRD it indicates SKU.
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*/
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sku_id = board_id();
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printk(BIOS_INFO, "SPD index %d\n", spd_index);
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printk(BIOS_INFO, "Board ID %d\n", sku_id);
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/* Load SPD data from CBFS */
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spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
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@ -110,16 +102,13 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
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}
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/* Assume same memory in both channels */
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spd_index *= SPD_LEN;
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memcpy(pei_data->spd_data[0][0], spd_file + spd_index, SPD_LEN);
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/*
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* XXX: This is incorrect usage. mem_cfg should be used here instead of
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* SKU ID. The current implementation of mem_config does not
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* support channel population.
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*/
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spd_span = spd_index * SPD_LEN;
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memcpy(pei_data->spd_data[0][0], spd_file + spd_span, SPD_LEN);
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if (sku_id != SCRD_SKU1)
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memcpy(pei_data->spd_data[1][0], spd_file + spd_index, SPD_LEN);
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if (spd_index != HYNIX_SINGLE_CHAN) {
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memcpy(pei_data->spd_data[1][0], spd_file + spd_span, SPD_LEN);
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printk(BIOS_INFO, "Dual channel SPD detected writing second channel\n");
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}
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/* Make sure a valid SPD was found */
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if (pei_data->spd_data[0][0][0] == 0)
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@ -30,4 +30,5 @@
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#define SPD_PART_LEN 18
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#define SPD_MANU_OFF 148
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#define HYNIX_SINGLE_CHAN 0x0
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#endif
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