mb/google/volteer/var/chronicler: change GPP_A8 pin define

Set GPIO GPP_A8 as high to enable EN_PP3300_TOUCHSCREEN.
also reduce enable delay time for meet panel power sequence.

BUG=b:197668845
BRANCH=volteer
TEST=FW_NAME=chronicler emerge-volteer coreboot chromeos-bootimage
     Verify no corruption is seen on the screen
     panel power sequence meet spec

Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I9a0c1d0afafb2c446fcb3d18e1a67573218614e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57103
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sheng-Liang Pan 2021-08-24 10:14:49 +08:00 committed by Tim Wawrzynczak
parent 44985ae757
commit 1fdda3e9d2
2 changed files with 2 additions and 2 deletions

View File

@ -10,7 +10,7 @@ static const struct pad_config override_gpio_table[] = {
/* A7 : I2S2_SCLK ==> EN_PP3300_TRACKPAD */
PAD_CFG_GPO(GPP_A7, 1, DEEP),
/* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO(GPP_A8, 0, DEEP),
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* A10 : I2S2_RXD ==> EN_SPKR_PA */
PAD_CFG_GPO(GPP_A10, 1, DEEP),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */

View File

@ -227,7 +227,7 @@ chip soc/intel/tigerlake
register "reset_delay_ms" = "10"
register "reset_off_delay_ms" = "5"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "enable_delay_ms" = "55"
register "enable_delay_ms" = "5"
register "has_power_resource" = "1"
device i2c 34 on end
end