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soc/mediatek/mt8188: Initialize SSPM 

SSPM is "Secure System Power Manager" that provides power control in
secure domain. The initialization flow is to load SSPM firmware to
its SRAM space and then enable.

It takes 21 ms to load sspm.bin.

coreboot logs:
CBFS: Found 'sspm.bin' @0x21680 size 0xa815 in mcache @0xffffeac4
mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137348 bytes)

TEST=we can see the sspm logs.
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Ib6443b64734048c1d71eeac650f36d7c4ac709cf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2022-07-22 13:41:45 +08:00 committed by Felix Held
parent 0c7a0f9638
commit 202f60b960
4 changed files with 13 additions and 1 deletions
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6
src/soc/mediatek/mt8188/Kconfig
View File

@ -23,4 +23,10 @@ config MCUPM_FIRMWARE
help
The file name of the MediaTek MCUPM firmware.
config SSPM_FIRMWARE
string
default "sspm.bin"
help
The file name of the MediaTek SSPM firmware.
endif

4
src/soc/mediatek/mt8188/Makefile.inc
View File

@ -30,6 +30,7 @@ ramstage-y += ../common/mt6359p.c mt6359p.c
ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c
ramstage-y += ../common/pmif_spi.c pmif_spi.c
ramstage-y += soc.c
ramstage-y += ../common/sspm.c
ramstage-y += ../common/usb.c usb.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include
@ -38,7 +39,8 @@ CPPFLAGS_common += -Isrc/soc/mediatek/common/include
MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188
mcu-firmware-files := \
$(CONFIG_MCUPM_FIRMWARE)
$(CONFIG_MCUPM_FIRMWARE) \
$(CONFIG_SSPM_FIRMWARE)
$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
$(eval $(fw)-file := $(MT8188_BLOB_DIR)/$(fw)) \

2
src/soc/mediatek/mt8188/include/soc/addressmap.h
View File

@ -41,6 +41,8 @@ enum {
I2C6_DMA_BASE = IO_PHYS + 0x00220600,
SCP_ADSP_CFG_BASE = IO_PHYS + 0x00720000,
DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000,
SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
SSPM_CFG_BASE = IO_PHYS + 0x00440000,
DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000,
DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000,
DPM_CFG_BASE = IO_PHYS + 0x00940000,

2
src/soc/mediatek/mt8188/soc.c
View File

@ -4,6 +4,7 @@
#include <soc/emi.h>
#include <soc/mcupm.h>
#include <soc/mmu_operations.h>
#include <soc/sspm.h>
#include <symbols.h>
static void soc_read_resources(struct device *dev)
@ -15,6 +16,7 @@ static void soc_init(struct device *dev)
{
mtk_mmu_disable_l2c_sram();
mcupm_init();
sspm_init();
}
static struct device_operations soc_ops = {