soc/mediatek/mt8188: Initialize SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable. It takes 21 ms to load sspm.bin. coreboot logs: CBFS: Found 'sspm.bin' @0x21680 size 0xa815 in mcache @0xffffeac4 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137348 bytes) TEST=we can see the sspm logs. BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: Ib6443b64734048c1d71eeac650f36d7c4ac709cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/66067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -23,4 +23,10 @@ config MCUPM_FIRMWARE
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help
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help
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The file name of the MediaTek MCUPM firmware.
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The file name of the MediaTek MCUPM firmware.
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config SSPM_FIRMWARE
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string
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default "sspm.bin"
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help
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The file name of the MediaTek SSPM firmware.
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endif
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endif
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@ -30,6 +30,7 @@ ramstage-y += ../common/mt6359p.c mt6359p.c
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ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c
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ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c
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ramstage-y += ../common/pmif_spi.c pmif_spi.c
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ramstage-y += ../common/pmif_spi.c pmif_spi.c
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ramstage-y += soc.c
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ramstage-y += soc.c
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ramstage-y += ../common/sspm.c
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ramstage-y += ../common/usb.c usb.c
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ramstage-y += ../common/usb.c usb.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include
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@ -38,7 +39,8 @@ CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188
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MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188
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mcu-firmware-files := \
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mcu-firmware-files := \
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$(CONFIG_MCUPM_FIRMWARE)
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$(CONFIG_MCUPM_FIRMWARE) \
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$(CONFIG_SSPM_FIRMWARE)
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$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
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$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
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$(eval $(fw)-file := $(MT8188_BLOB_DIR)/$(fw)) \
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$(eval $(fw)-file := $(MT8188_BLOB_DIR)/$(fw)) \
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@ -41,6 +41,8 @@ enum {
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I2C6_DMA_BASE = IO_PHYS + 0x00220600,
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I2C6_DMA_BASE = IO_PHYS + 0x00220600,
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SCP_ADSP_CFG_BASE = IO_PHYS + 0x00720000,
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SCP_ADSP_CFG_BASE = IO_PHYS + 0x00720000,
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DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000,
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DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000,
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SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
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SSPM_CFG_BASE = IO_PHYS + 0x00440000,
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DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000,
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DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000,
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DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000,
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DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000,
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DPM_CFG_BASE = IO_PHYS + 0x00940000,
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DPM_CFG_BASE = IO_PHYS + 0x00940000,
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@ -4,6 +4,7 @@
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#include <soc/emi.h>
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#include <soc/emi.h>
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#include <soc/mcupm.h>
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#include <soc/mcupm.h>
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#include <soc/mmu_operations.h>
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#include <soc/mmu_operations.h>
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#include <soc/sspm.h>
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#include <symbols.h>
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#include <symbols.h>
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static void soc_read_resources(struct device *dev)
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static void soc_read_resources(struct device *dev)
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@ -15,6 +16,7 @@ static void soc_init(struct device *dev)
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{
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{
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mtk_mmu_disable_l2c_sram();
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mtk_mmu_disable_l2c_sram();
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mcupm_init();
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mcupm_init();
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sspm_init();
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}
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}
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static struct device_operations soc_ops = {
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static struct device_operations soc_ops = {
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