arch/x86: Support "weak" BIST and timestamp save routines

Not all x86 architectures support the mm register set.  The default
routine that saves BIST in mm0 and a "weak" routine that saves the TSC
value in mm2:mm1.  Select the Kconfig value
BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP to provide a replacement routine to
save the BIST and timestamp values.

TEST=Build and run on Amenia and Galileo Gen2.

Change-Id: I8119e74664ac3522c011767d424d441cd62545ce
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15126
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2016-06-05 18:41:00 -07:00 committed by Leroy P Leahy
parent db601b6818
commit 2030d257d1
2 changed files with 28 additions and 3 deletions

View File

@ -133,6 +133,15 @@ config BOOTBLOCK_NORTHBRIDGE_INIT
config BOOTBLOCK_RESETS
string
config BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP
bool
default n
help
Select this value to provide a routine to save the BIST and timestamp
values. The default code places the BIST value in MM0 and the
timestamp value in MM2:MM1. Another file is necessary when the CPU
does not support the MMx register set.
config HAVE_CMOS_DEFAULT
def_bool n

View File

@ -43,12 +43,28 @@ debug_spinloop:
#endif
bootblock_protected_mode_entry:
/* Save BIST result */
movd %eax, %mm0
/* Save an early timestamp */
/* BIST result in eax */
movl %eax, %ebx
/* Get an early timestamp */
rdtsc
#if IS_ENABLED(CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP)
lea 1f, %ebp
/* eax: Low 32-bits of timestamp
* ebx: BIST result
* ebp: return address
* edx: High 32-bits of timestamp
*/
jmp bootblock_save_bist_and_timestamp
1:
#else
movd %ebx, %mm0
movd %eax, %mm1
movd %edx, %mm2
#endif
#if IS_ENABLED(CONFIG_SSE)
enable_sse: