arch/x86: Support "weak" BIST and timestamp save routines
Not all x86 architectures support the mm register set. The default routine that saves BIST in mm0 and a "weak" routine that saves the TSC value in mm2:mm1. Select the Kconfig value BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP to provide a replacement routine to save the BIST and timestamp values. TEST=Build and run on Amenia and Galileo Gen2. Change-Id: I8119e74664ac3522c011767d424d441cd62545ce Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15126 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -133,6 +133,15 @@ config BOOTBLOCK_NORTHBRIDGE_INIT
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config BOOTBLOCK_RESETS
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string
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config BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP
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bool
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default n
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help
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Select this value to provide a routine to save the BIST and timestamp
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values. The default code places the BIST value in MM0 and the
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timestamp value in MM2:MM1. Another file is necessary when the CPU
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does not support the MMx register set.
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config HAVE_CMOS_DEFAULT
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def_bool n
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@ -43,12 +43,28 @@ debug_spinloop:
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#endif
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bootblock_protected_mode_entry:
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/* Save BIST result */
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movd %eax, %mm0
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/* Save an early timestamp */
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/* BIST result in eax */
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movl %eax, %ebx
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/* Get an early timestamp */
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rdtsc
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#if IS_ENABLED(CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP)
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lea 1f, %ebp
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/* eax: Low 32-bits of timestamp
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* ebx: BIST result
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* ebp: return address
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* edx: High 32-bits of timestamp
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*/
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jmp bootblock_save_bist_and_timestamp
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1:
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#else
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movd %ebx, %mm0
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movd %eax, %mm1
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movd %edx, %mm2
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#endif
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#if IS_ENABLED(CONFIG_SSE)
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enable_sse:
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