diff --git a/src/soc/amd/common/psp_verstage/Kconfig b/src/soc/amd/common/psp_verstage/Kconfig
index 526a4ae722..dc6ea1c3ee 100644
--- a/src/soc/amd/common/psp_verstage/Kconfig
+++ b/src/soc/amd/common/psp_verstage/Kconfig
@@ -35,3 +35,11 @@ config SEPARATE_SIGNED_PSPFW
 	help
 	  Put signed AMD/PSP firmwares outside FW_MAIN_[AB] so vboot doesn't verify them,
 	  and rely on PSP's verification.
+
+config PSP_VERSTAGE_STACK_IS_MAPPED
+	bool
+	default y if SOC_AMD_PICASSO
+	default n
+	help
+	  This configuration indicates whether the PSP Verstage stack is mapped to a virtual
+	  address space. This has been the case so far only in Picasso SoC.
diff --git a/src/soc/amd/common/psp_verstage/vboot_crypto.c b/src/soc/amd/common/psp_verstage/vboot_crypto.c
index b2c0c563f8..5ed351b604 100644
--- a/src/soc/amd/common/psp_verstage/vboot_crypto.c
+++ b/src/soc/amd/common/psp_verstage/vboot_crypto.c
@@ -90,8 +90,11 @@ vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, uint32_t size)
 	 * mapped address of SPI flash which makes crypto engine to return invalid address.
 	 * Hence if the buffer is from SRAM, pass it to crypto engine. Else copy into a
 	 * temporary buffer before passing it to crypto engine.
+	 *
+	 * Similarly in some SoCs, PSP verstage stack is mapped to a virtual address space.
+	 * In those SoCs, assume that the buffer is from SRAM and pass it to crypto engine.
 	 */
-	if (buf >= _sram && (buf + size) < _esram)
+	if (CONFIG(PSP_VERSTAGE_STACK_IS_MAPPED) || (buf >= _sram && (buf + size) < _esram))
 		return vb2ex_hwcrypto_digest_extend_psp_sram(buf, size);
 
 	while (size) {