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soc/intel/xeon_sp/ebg: Add periodic SMI bits definition 

Change-Id: Ia906a115538964628958bb4b6e3de3aa71577cce
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76252
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michał Żygowski 2023-07-05 12:12:25 +02:00 committed by Felix Held
parent 4fcaccf5da
commit 204ffcb98d
1 changed files with 5 additions and 0 deletions
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5
src/soc/intel/xeon_sp/ebg/include/soc/pmc.h
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@ -14,6 +14,11 @@
#define SUS_PWR_FLR (1 << 16)
#define PWR_FLR (1 << 14)
#define HOST_RST_STS (1 << 9)
#define PER_SMI_SEL_MASK (3 << 1)
#define SMI_RATE_64S (0 << 1)
#define SMI_RATE_32S (1 << 1)
#define SMI_RATE_16S (2 << 1)
#define SMI_RATE_8S (3 << 1)
#define SLEEP_AFTER_POWER_FAIL (1 << 0)
#define GEN_PMCON_B 0x1024
#define SLP_STR_POL_LOCK (1 << 18)