mb/google/rex/var/screebo: Configure Acoustic noise mitigation

Enable Acoustic noise mitigation for google/screebo and set slew rate
to 1/8 for IA domain and ignore the slew rate for SA domain.

BUG=b:312405633,
TEST=Able to build and boot google/screebo.

Before:

[SPEW ]   AcousticNoiseMitigation : 0x0
[SPEW ]   FastPkgCRampDisable for Index = 0 : 0x0
[SPEW ]   SlowSlewRate for Index = 0 : 0x0

After:

[SPEW ]   AcousticNoiseMitigation : 0x1
[SPEW ]   FastPkgCRampDisable for Index = 0 : 0x1
[SPEW ]   SlowSlewRate for Index = 0 : 0x2

Change-Id: Ib86939ab48c2c6e7d0491d7c1cb4a2c7c6a1b568
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79323
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: YH Lin <yueherngl@google.com>
This commit is contained in:
Subrata Banik 2023-11-28 23:07:33 +05:30
parent 26fdb062a7
commit 20629b4e65
1 changed files with 9 additions and 0 deletions

View File

@ -90,6 +90,15 @@ chip soc/intel/meteorlake
[PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoPci,
}" }"
# Acoustic Noise settings and slew rate configuration:
# slew rate for IA Domain: Fast/8
# Ignore slew rate configuration for SA Domain
register "enable_acoustic_noise_mitigation" = "1"
register "disable_fast_pkgc_ramp[VR_DOMAIN_IA]" = "1"
register "slow_slew_rate_config[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "slow_slew_rate_config[VR_DOMAIN_SA]" = "SLEW_IGNORE"
# Intel Common SoC Config # Intel Common SoC Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |