doc/relnotes/4.14: add Intel Xeon-SP support status change
Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: Ibead1c75bb4e41fedc2799366b5b006d76fc8f4e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52735 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -76,4 +76,28 @@ now passed from within SMM_MODULE_LOADER. Allocation and initialisations
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for common ACPI GNVS table entries were largely moved to one centralized
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implementation.
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### Intel Xeon Scalable Processor support is now considered mature
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Intel Xeon Scalable Processor (Xeon-SP) family [1] is designed
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primarily to serve the needs of the server market.
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coreboot support for Xeon-SP is in src/soc/intel/xeon_sp directory.
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This release has support for SkyLake-SP (SKX-SP) which is the 2nd
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generation, and for CooperLake-SP (CPX-SP) which is the 3rd generation
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or the latest generation [2] on market.
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With this release, the codebase for multiple generations of Xeon-SP
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were unified and optimized:
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* SKX-SP SoC code is used in OCP TiogaPass mainboard [3]. Support for
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this board is in Proof Of Concept Status.
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* CPX-SP SoC code is used in OCP DeltaLake mainboard. Support for
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this board is in DVT (Design Validation Test) exit equivalent status.
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Features supported, (performance/stability) test scopes, known issues,
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features gaps are described in [4].
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### Add significant changes here
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[1] https://www.intel.com/content/www/us/en/products/details/processors/xeon/scalable.html
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[2] https://www.intel.com/content/www/us/en/products/docs/processors/xeon/3rd-gen-xeon-scalable-processors-brief.html
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[3] ../mainboard/ocp/tiogapass.md
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[4] ../mainboard/ocp/deltalake.md
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