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AGESA: Fix invalid BLDCFG_ and CFG_ use 

The definitions of CFG_ would evaluate to incorrect values
when Options.h is included outside buildOpts.c, where all
BLDCFG_ values are defined.

Already done for f16kb.

Change-Id: I5d725b9306027c7c46c6450ab17b692fa948cf5b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14886
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2016-05-18 14:04:45 +03:00
parent b97dc871d9
commit 206e157cc1
10 changed files with 236 additions and 241 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

136
src/vendorcode/amd/agesa/f10/Include/Options.h
View File

@ -64,140 +64,4 @@ typedef struct {
IMAGE_ENTRY EntryPoint; ///< The corresponding entry point to call.
} DISPATCH_TABLE;
/*
* Platform common build option and configuration processing.
*
* Defaults selection goes into the platform install .h file. If the default is
* not platform specific, it goes here.
*
*/
// HT Configuration
#ifdef BLDCFG_STARTING_BUSNUM
#define CFG_STARTING_BUSNUM (BLDCFG_STARTING_BUSNUM)
#else
#define CFG_STARTING_BUSNUM (0)
#endif
#ifdef BLDCFG_MAXIMUM_BUSNUM
#define CFG_MAXIMUM_BUSNUM (BLDCFG_MAXIMUM_BUSNUM)
#else
#define CFG_MAXIMUM_BUSNUM (0xF8)
#endif
#ifdef BLDCFG_ALLOCATED_BUSNUM
#define CFG_ALLOCATED_BUSNUM (BLDCFG_ALLOCATED_BUSNUM)
#else
#define CFG_ALLOCATED_BUSNUM (0x20)
#endif
#ifdef BLDCFG_BUID_SWAP_LIST
#define CFG_BUID_SWAP_LIST (BLDCFG_BUID_SWAP_LIST)
#else
#define CFG_BUID_SWAP_LIST (NULL)
#endif
#ifdef BLDCFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST
#define CFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST (BLDCFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST)
#else
#define CFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST (NULL)
#endif
#ifdef BLDCFG_HTFABRIC_LIMITS_LIST
#define CFG_HTFABRIC_LIMITS_LIST (BLDCFG_HTFABRIC_LIMITS_LIST)
#else
#define CFG_HTFABRIC_LIMITS_LIST (NULL)
#endif
#ifdef BLDCFG_HTCHAIN_LIMITS_LIST
#define CFG_HTCHAIN_LIMITS_LIST (BLDCFG_HTCHAIN_LIMITS_LIST)
#else
#define CFG_HTCHAIN_LIMITS_LIST (NULL)
#endif
#ifdef BLDCFG_BUS_NUMBERS_LIST
#define CFG_BUS_NUMBERS_LIST (BLDCFG_BUS_NUMBERS_LIST)
#else
#define CFG_BUS_NUMBERS_LIST (NULL)
#endif
#ifdef BLDCFG_IGNORE_LINK_LIST
#define CFG_IGNORE_LINK_LIST (BLDCFG_IGNORE_LINK_LIST)
#else
#define CFG_IGNORE_LINK_LIST (NULL)
#endif
#ifdef BLDCFG_LINK_SKIP_REGANG_LIST
#define CFG_LINK_SKIP_REGANG_LIST (BLDCFG_LINK_SKIP_REGANG_LIST)
#else
#define CFG_LINK_SKIP_REGANG_LIST (NULL)
#endif
#ifdef BLDCFG_SET_HTCRC_SYNC_FLOOD
#define CFG_SET_HTCRC_SYNC_FLOOD (BLDCFG_SET_HTCRC_SYNC_FLOOD)
#else
#define CFG_SET_HTCRC_SYNC_FLOOD (FALSE)
#endif
#ifdef BLDCFG_USE_UNIT_ID_CLUMPING
#define CFG_USE_UNIT_ID_CLUMPING (BLDCFG_USE_UNIT_ID_CLUMPING)
#else
#define CFG_USE_UNIT_ID_CLUMPING (FALSE)
#endif
#ifdef BLDCFG_ADDITIONAL_TOPOLOGIES_LIST
#define CFG_ADDITIONAL_TOPOLOGIES_LIST (BLDCFG_ADDITIONAL_TOPOLOGIES_LIST)
#else
#define CFG_ADDITIONAL_TOPOLOGIES_LIST (NULL)
#endif
#ifdef BLDCFG_USE_HT_ASSIST
#define CFG_USE_HT_ASSIST (BLDCFG_USE_HT_ASSIST)
#else
#define CFG_USE_HT_ASSIST (TRUE)
#endif
#ifdef BLDCFG_PLATFORM_CONTROL_FLOW_MODE
#define CFG_PLATFORM_CONTROL_FLOW_MODE (BLDCFG_PLATFORM_CONTROL_FLOW_MODE)
#else
#define CFG_PLATFORM_CONTROL_FLOW_MODE (Nfcm)
#endif
#ifdef BLDCFG_PLATFORM_DEEMPHASIS_LIST
#define CFG_PLATFORM_DEEMPHASIS_LIST (BLDCFG_PLATFORM_DEEMPHASIS_LIST)
#else
#define CFG_PLATFORM_DEEMPHASIS_LIST (NULL)
#endif
#ifdef BLDCFG_VRM_ADDITIONAL_DELAY
#define CFG_VRM_ADDITIONAL_DELAY (BLDCFG_VRM_ADDITIONAL_DELAY)
#else
#define CFG_VRM_ADDITIONAL_DELAY (0)
#endif
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#endif // _OPTIONS_H_

126
src/vendorcode/amd/agesa/f10/Include/PlatformInstall.h
View File

@ -774,6 +774,132 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_TEMP_PCIE_MMIO_BASE_ADDRESS 0xD0000000
#endif
#ifdef BLDCFG_STARTING_BUSNUM
#define CFG_STARTING_BUSNUM (BLDCFG_STARTING_BUSNUM)
#else
#define CFG_STARTING_BUSNUM (0)
#endif
#ifdef BLDCFG_MAXIMUM_BUSNUM
#define CFG_MAXIMUM_BUSNUM (BLDCFG_MAXIMUM_BUSNUM)
#else
#define CFG_MAXIMUM_BUSNUM (0xF8)
#endif
#ifdef BLDCFG_ALLOCATED_BUSNUM
#define CFG_ALLOCATED_BUSNUM (BLDCFG_ALLOCATED_BUSNUM)
#else
#define CFG_ALLOCATED_BUSNUM (0x20)
#endif
#ifdef BLDCFG_BUID_SWAP_LIST
#define CFG_BUID_SWAP_LIST (BLDCFG_BUID_SWAP_LIST)
#else
#define CFG_BUID_SWAP_LIST (NULL)
#endif
#ifdef BLDCFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST
#define CFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST (BLDCFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST)
#else
#define CFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST (NULL)
#endif
#ifdef BLDCFG_HTFABRIC_LIMITS_LIST
#define CFG_HTFABRIC_LIMITS_LIST (BLDCFG_HTFABRIC_LIMITS_LIST)
#else
#define CFG_HTFABRIC_LIMITS_LIST (NULL)
#endif
#ifdef BLDCFG_HTCHAIN_LIMITS_LIST
#define CFG_HTCHAIN_LIMITS_LIST (BLDCFG_HTCHAIN_LIMITS_LIST)
#else
#define CFG_HTCHAIN_LIMITS_LIST (NULL)
#endif
#ifdef BLDCFG_BUS_NUMBERS_LIST
#define CFG_BUS_NUMBERS_LIST (BLDCFG_BUS_NUMBERS_LIST)
#else
#define CFG_BUS_NUMBERS_LIST (NULL)
#endif
#ifdef BLDCFG_IGNORE_LINK_LIST
#define CFG_IGNORE_LINK_LIST (BLDCFG_IGNORE_LINK_LIST)
#else
#define CFG_IGNORE_LINK_LIST (NULL)
#endif
#ifdef BLDCFG_LINK_SKIP_REGANG_LIST
#define CFG_LINK_SKIP_REGANG_LIST (BLDCFG_LINK_SKIP_REGANG_LIST)
#else
#define CFG_LINK_SKIP_REGANG_LIST (NULL)
#endif
#ifdef BLDCFG_SET_HTCRC_SYNC_FLOOD
#define CFG_SET_HTCRC_SYNC_FLOOD (BLDCFG_SET_HTCRC_SYNC_FLOOD)
#else
#define CFG_SET_HTCRC_SYNC_FLOOD (FALSE)
#endif
#ifdef BLDCFG_USE_UNIT_ID_CLUMPING
#define CFG_USE_UNIT_ID_CLUMPING (BLDCFG_USE_UNIT_ID_CLUMPING)
#else
#define CFG_USE_UNIT_ID_CLUMPING (FALSE)
#endif
#ifdef BLDCFG_ADDITIONAL_TOPOLOGIES_LIST
#define CFG_ADDITIONAL_TOPOLOGIES_LIST (BLDCFG_ADDITIONAL_TOPOLOGIES_LIST)
#else
#define CFG_ADDITIONAL_TOPOLOGIES_LIST (NULL)
#endif
#ifdef BLDCFG_USE_HT_ASSIST
#define CFG_USE_HT_ASSIST (BLDCFG_USE_HT_ASSIST)
#else
#define CFG_USE_HT_ASSIST (TRUE)
#endif
#ifdef BLDCFG_PLATFORM_CONTROL_FLOW_MODE
#define CFG_PLATFORM_CONTROL_FLOW_MODE (BLDCFG_PLATFORM_CONTROL_FLOW_MODE)
#else
#define CFG_PLATFORM_CONTROL_FLOW_MODE (Nfcm)
#endif
#ifdef BLDCFG_PLATFORM_DEEMPHASIS_LIST
#define CFG_PLATFORM_DEEMPHASIS_LIST (BLDCFG_PLATFORM_DEEMPHASIS_LIST)
#else
#define CFG_PLATFORM_DEEMPHASIS_LIST (NULL)
#endif
#ifdef BLDCFG_VRM_ADDITIONAL_DELAY
#define CFG_VRM_ADDITIONAL_DELAY (BLDCFG_VRM_ADDITIONAL_DELAY)
#else
#define CFG_VRM_ADDITIONAL_DELAY (0)
#endif
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#ifdef BLDOPT_REMOVE_EARLY_SAMPLES
#if BLDOPT_REMOVE_EARLY_SAMPLES == TRUE
#undef OPTION_EARLY_SAMPLES

24
src/vendorcode/amd/agesa/f12/Include/Options.h
View File

@ -64,28 +64,4 @@ typedef struct {
IMAGE_ENTRY EntryPoint; ///< The corresponding entry point to call.
} DISPATCH_TABLE;
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#endif // _OPTIONS_H_

25
src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
View File

@ -2087,6 +2087,31 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#else
#define CFG_LVDS_24BBP_PANEL_MODE 0
#endif
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/

23
src/vendorcode/amd/agesa/f14/Include/Options.h
View File

@ -67,28 +67,5 @@ typedef struct {
IMAGE_ENTRY EntryPoint; ///< The corresponding entry point to call.
} DISPATCH_TABLE;
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#endif // _OPTIONS_H_

25
src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
View File

@ -2000,6 +2000,31 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#else
#define CFG_LVDS_MISC_BLON_ACTIVE_LOW FALSE
#endif
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/

29
src/vendorcode/amd/agesa/f15/Include/Options.h
View File

@ -65,34 +65,5 @@ typedef struct {
IMAGE_ENTRY EntryPoint; ///< The corresponding entry point to call.
} DISPATCH_TABLE;
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#ifdef BLDCFG_IOMMU_EXCLUSION_RANGE_LIST
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (BLDCFG_IOMMU_EXCLUSION_RANGE_LIST)
#else
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (NULL)
#endif
#endif // _OPTIONS_H_

30
src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
View File

@ -2094,6 +2094,36 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_FORCE_MICROSERVER FALSE
#endif
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#ifdef BLDCFG_IOMMU_EXCLUSION_RANGE_LIST
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (BLDCFG_IOMMU_EXCLUSION_RANGE_LIST)
#else
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (NULL)
#endif
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/

29
src/vendorcode/amd/agesa/f15tn/Include/Options.h
View File

@ -64,34 +64,5 @@ typedef struct {
IMAGE_ENTRY EntryPoint; ///< The corresponding entry point to call.
} DISPATCH_TABLE;
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#ifdef BLDCFG_IOMMU_EXCLUSION_RANGE_LIST
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (BLDCFG_IOMMU_EXCLUSION_RANGE_LIST)
#else
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (NULL)
#endif
#endif // _OPTIONS_H_

30
src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
View File

@ -2492,6 +2492,36 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_DISPLAY_MISC_VBIOS_FAST_BOOT_ENABLE FALSE
#endif
#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE
#define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE)
#else
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
#else
#define CFG_AP_MTRR_SETTINGS_LIST (NULL)
#endif
#ifdef BLDCFG_IOMMU_EXCLUSION_RANGE_LIST
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (BLDCFG_IOMMU_EXCLUSION_RANGE_LIST)
#else
#define CFG_IOMMU_EXCLUSION_RANGE_LIST (NULL)
#endif
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/