baytrail: reinitialize spi controller in SMM finalization

On the SMM APM_CNT_FINALIZE step reinitialize the SPI
controller so that it can still log events after the SPI
controller has been locked down.

BUG=chrome-os-partner:24624
BRANCH=baytrail
TEST=Built and booted. Events still logged after SPI controller
     has been locked down.

Original-Change-Id: I41a3e12c0398303e74f95eb6df82d5bc4303898b
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/185630
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 28ffb1a9e761cdfeb173bd533684db1011260e0a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ia82753cba9ae4f049de2e81061739efc21d49a1e
Reviewed-on: http://review.coreboot.org/9296
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2014-02-09 16:04:06 -06:00 committed by Marc Jones
parent 9484f5577e
commit 2088571f56
1 changed files with 21 additions and 0 deletions

View File

@ -26,6 +26,7 @@
#include <device/pci_def.h> #include <device/pci_def.h>
#include <elog.h> #include <elog.h>
#include <halt.h> #include <halt.h>
#include <spi-generic.h>
#include <baytrail/pci_devs.h> #include <baytrail/pci_devs.h>
#include <baytrail/pmc.h> #include <baytrail/pmc.h>
@ -232,6 +233,23 @@ static void southbridge_smi_gsmi(void)
*ret = gsmi_exec(sub_command, param); *ret = gsmi_exec(sub_command, param);
} }
#endif #endif
static void finalize(void)
{
static int finalize_done;
if (finalize_done) {
printk(BIOS_DEBUG, "SMM already finalized.\n");
return;
}
finalize_done = 1;
#if CONFIG_SPI_FLASH_SMM
/* Re-init SPI driver to handle locked BAR */
spi_init();
#endif
}
static void southbridge_smi_apmc(void) static void southbridge_smi_apmc(void)
{ {
uint8_t reg8; uint8_t reg8;
@ -282,6 +300,9 @@ static void southbridge_smi_apmc(void)
southbridge_smi_gsmi(); southbridge_smi_gsmi();
break; break;
#endif #endif
case APM_CNT_FINALIZE:
finalize();
break;
} }
mainboard_smi_apmc(reg8); mainboard_smi_apmc(reg8);