Automatically fetch bus information for mptable from
the device tree, instead of using hardcoded values. If this changes behaviour, this is either - a bug in mptable_write_buses(), or - a bug in the old mptable or device config, that is they were inconsistent. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
0a6d1aebf1
commit
20979584fe
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@ -10,6 +10,7 @@ static void *smp_write_config_table(void *v)
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static const char oem[8] = "COREBOOT";
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static const char oem[8] = "COREBOOT";
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static const char productid[12] = "S2735 ";
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static const char productid[12] = "S2735 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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int isa_bus;
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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memset(mc, 0, sizeof(*mc));
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memset(mc, 0, sizeof(*mc));
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@ -29,15 +30,7 @@ static void *smp_write_config_table(void *v)
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mc->reserved = 0;
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mc->reserved = 0;
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smp_write_processors(mc);
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smp_write_processors(mc);
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mptable_write_buses(mc, NULL, &isa_bus);
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/*Bus: Bus ID Type*/
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smp_write_bus(mc, 0, "PCI ");
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smp_write_bus(mc, 1, "PCI ");
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smp_write_bus(mc, 2, "PCI ");
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smp_write_bus(mc, 3, "PCI ");
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smp_write_bus(mc, 4, "PCI ");
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smp_write_bus(mc, 5, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
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smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
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{
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{
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@ -58,7 +51,7 @@ static void *smp_write_config_table(void *v)
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}
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}
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}
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}
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}
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}
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mptable_add_isa_interrupts(mc, 0x5, 0x8, 0);
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mptable_add_isa_interrupts(mc, isa_bus, 0x8, 0);
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/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
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/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
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*/
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*/
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@ -50,8 +50,7 @@ static void *smp_write_config_table(void *v)
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static const char productid[12] = "S2850 ";
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static const char productid[12] = "S2850 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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unsigned char bus_num;
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int bus_isa;
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unsigned char bus_isa;
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unsigned char bus_chain_0;
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unsigned char bus_chain_0;
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unsigned char bus_8111_1;
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unsigned char bus_8111_1;
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unsigned apicid_base;
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unsigned apicid_base;
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@ -88,23 +87,15 @@ static void *smp_write_config_table(void *v)
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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if (dev) {
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if (dev) {
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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else {
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else {
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
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bus_8111_1 = 2;
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bus_8111_1 = 2;
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bus_isa = 3;
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}
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}
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}
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}
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/*Bus: Bus ID Type*/
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/*Bus: Bus ID Type*/
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/* define bus and isa numbers */
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mptable_write_buses(mc, NULL, &bus_isa);
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for(bus_num = 0; bus_num < bus_isa; bus_num++) {
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smp_write_bus(mc, bus_num, "PCI ");
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}
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smp_write_bus(mc, bus_isa, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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#if CONFIG_LOGICAL_CPUS==1
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@ -48,8 +48,7 @@ static void *smp_write_config_table(void *v)
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static const char productid[12] = "S2875 ";
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static const char productid[12] = "S2875 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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unsigned char bus_num;
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int bus_isa;
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unsigned char bus_isa;
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unsigned char bus_chain_0;
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unsigned char bus_chain_0;
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unsigned char bus_8111_1;
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unsigned char bus_8111_1;
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unsigned char bus_8151_1;
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unsigned char bus_8151_1;
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@ -89,15 +88,11 @@ static void *smp_write_config_table(void *v)
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,0));
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if (dev) {
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if (dev) {
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
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}
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}
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else {
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else {
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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bus_8111_1 = 3;
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bus_8111_1 = 3;
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bus_isa = 4;
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}
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}
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/* 8151 */
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/* 8151 */
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
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@ -116,11 +111,7 @@ static void *smp_write_config_table(void *v)
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}
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}
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/*Bus: Bus ID Type*/
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/*Bus: Bus ID Type*/
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/* define bus and isa numbers */
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mptable_write_buses(mc, NULL, &bus_isa);
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for(bus_num = 0; bus_num < bus_isa; bus_num++) {
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smp_write_bus(mc, bus_num, "PCI ");
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}
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smp_write_bus(mc, bus_isa, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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#if CONFIG_LOGICAL_CPUS==1
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@ -50,8 +50,7 @@ static void *smp_write_config_table(void *v)
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static const char productid[12] = "S2880 ";
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static const char productid[12] = "S2880 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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unsigned char bus_num;
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int bus_isa;
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unsigned char bus_isa;
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unsigned char bus_chain_0;
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unsigned char bus_chain_0;
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unsigned char bus_8131_1;
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unsigned char bus_8131_1;
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unsigned char bus_8131_2;
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unsigned char bus_8131_2;
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
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if (dev) {
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if (dev) {
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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else {
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else {
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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bus_8111_1 = 4;
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bus_8111_1 = 4;
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bus_isa = 5;
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}
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}
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/* 8131-1 */
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/* 8131-1 */
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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}
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}
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/*Bus: Bus ID Type*/
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/*Bus: Bus ID Type*/
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/* define bus and isa numbers */
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mptable_write_buses(mc, NULL, &bus_isa);
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for(bus_num = 0; bus_num < bus_isa; bus_num++) {
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smp_write_bus(mc, bus_num, "PCI ");
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}
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smp_write_bus(mc, bus_isa, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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#if CONFIG_LOGICAL_CPUS==1
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@ -48,8 +48,7 @@ static void *smp_write_config_table(void *v)
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static const char productid[12] = "S4880 ";
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static const char productid[12] = "S4880 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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unsigned char bus_num;
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int bus_isa;
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unsigned char bus_isa;
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unsigned char bus_chain_0;
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unsigned char bus_chain_0;
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unsigned char bus_8131_1;
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unsigned char bus_8131_1;
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unsigned char bus_8131_2;
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unsigned char bus_8131_2;
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
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if (dev) {
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if (dev) {
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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else {
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else {
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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bus_8111_1 = 4;
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bus_8111_1 = 4;
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bus_isa = 5;
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}
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}
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/* 8131-1 */
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/* 8131-1 */
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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}
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}
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/*Bus: Bus ID Type*/
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/*Bus: Bus ID Type*/
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/* define bus and isa numbers */
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mptable_write_buses(mc, NULL, &bus_isa);
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for(bus_num = 0; bus_num < bus_isa; bus_num++) {
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smp_write_bus(mc, bus_num, "PCI ");
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}
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smp_write_bus(mc, bus_isa, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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#if CONFIG_LOGICAL_CPUS==1
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@ -49,8 +49,7 @@ static void *smp_write_config_table(void *v)
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static const char productid[12] = "S4882 ";
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static const char productid[12] = "S4882 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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unsigned char bus_num;
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int bus_isa;
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unsigned char bus_isa;
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unsigned char bus_chain_0;
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unsigned char bus_chain_0;
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unsigned char bus_8131_1;
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unsigned char bus_8131_1;
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unsigned char bus_8131_2;
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unsigned char bus_8131_2;
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@ -94,14 +93,11 @@ static void *smp_write_config_table(void *v)
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
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if (dev) {
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if (dev) {
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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else {
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else {
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
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bus_8111_1 = 4;
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bus_8111_1 = 4;
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bus_isa = 5;
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}
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}
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/* 8131-1 */
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/* 8131-1 */
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
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@ -128,12 +124,7 @@ static void *smp_write_config_table(void *v)
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}
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}
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/*Bus: Bus ID Type*/
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/*Bus: Bus ID Type*/
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/* define bus and isa numbers */
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mptable_write_buses(mc, NULL, &bus_isa);
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for(bus_num = 0; bus_num < bus_isa; bus_num++) {
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smp_write_bus(mc, bus_num, "PCI ");
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}
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smp_write_bus(mc, bus_isa, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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#if CONFIG_LOGICAL_CPUS==1
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#if CONFIG_LOGICAL_CPUS==1
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@ -12,6 +12,7 @@ static void *smp_write_config_table(void *v)
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static const char oem[8] = "COREBOOT";
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static const char oem[8] = "COREBOOT";
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static const char productid[12] = "P4DPE ";
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static const char productid[12] = "P4DPE ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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int isa_bus;
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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memset(mc, 0, sizeof(*mc));
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memset(mc, 0, sizeof(*mc));
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@ -31,12 +32,8 @@ static void *smp_write_config_table(void *v)
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mc->reserved = 0;
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mc->reserved = 0;
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smp_write_processors(mc);
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smp_write_processors(mc);
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mptable_write_buses(mc, NULL, &isa_bus);
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/*Bus: Bus ID Type*/
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smp_write_bus(mc, 0, "PCI ");
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smp_write_bus(mc, 1, "PCI ");
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smp_write_bus(mc, 2, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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/*I/O APICs: APIC ID Version State Address*/
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smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
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smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
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{
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{
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@ -71,7 +68,7 @@ static void *smp_write_config_table(void *v)
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}
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}
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}
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}
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}
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}
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mptable_add_isa_interrupts(mc, 0x2, 0x2, 0);
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mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
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/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x15);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x15);
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@ -29,9 +29,6 @@
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#include <stdint.h>
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#include <stdint.h>
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#include "../../../southbridge/via/vt8237r/vt8237r.h"
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#include "../../../southbridge/via/vt8237r/vt8237r.h"
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#define bus_isa 2
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static void *smp_write_config_table(void *v)
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static void *smp_write_config_table(void *v)
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{
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{
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static const char sig[4] = "PCMP";
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static const char sig[4] = "PCMP";
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@ -39,7 +36,7 @@ static void *smp_write_config_table(void *v)
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static const char productid[12] = "PC2500 ";
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static const char productid[12] = "PC2500 ";
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struct mp_config_table *mc;
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struct mp_config_table *mc;
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int bus_num;
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int isa_bus;
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||||||
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
|
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
|
||||||
memset(mc, 0, sizeof(*mc));
|
memset(mc, 0, sizeof(*mc));
|
||||||
|
@ -59,21 +56,13 @@ static void *smp_write_config_table(void *v)
|
||||||
mc->reserved = 0;
|
mc->reserved = 0;
|
||||||
|
|
||||||
smp_write_processors(mc);
|
smp_write_processors(mc);
|
||||||
|
mptable_write_buses(mc, NULL, &isa_bus);
|
||||||
|
|
||||||
/* Bus: Bus ID Type*/
|
|
||||||
/* define numbers for pci and isa bus */
|
|
||||||
for (bus_num = 0; bus_num < bus_isa; bus_num++) {
|
|
||||||
smp_write_bus(mc, bus_num, "PCI ");
|
|
||||||
}
|
|
||||||
smp_write_bus(mc, bus_isa, "ISA ");
|
|
||||||
|
|
||||||
|
|
||||||
/* I/O APICs: APIC ID Version State Address*/
|
/* I/O APICs: APIC ID Version State Address*/
|
||||||
smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
|
smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
|
||||||
|
|
||||||
/* Now, assemble the table. */
|
/* Now, assemble the table. */
|
||||||
mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
|
mptable_add_isa_interrupts(mc, isa_bus, VT8237R_APIC_ID, 0);
|
||||||
|
|
||||||
#define PCI_INT(bus, dev, fn, pin) \
|
#define PCI_INT(bus, dev, fn, pin) \
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \
|
||||||
|
|
|
@ -33,6 +33,7 @@ static void *smp_write_config_table(void *v)
|
||||||
static const char oem[8] = "COREBOOT";
|
static const char oem[8] = "COREBOOT";
|
||||||
static const char productid[12] = "VIA VT8454C ";
|
static const char productid[12] = "VIA VT8454C ";
|
||||||
struct mp_config_table *mc;
|
struct mp_config_table *mc;
|
||||||
|
int isa_bus;
|
||||||
|
|
||||||
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
|
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
|
||||||
memset(mc, 0, sizeof(*mc));
|
memset(mc, 0, sizeof(*mc));
|
||||||
|
@ -52,18 +53,12 @@ static void *smp_write_config_table(void *v)
|
||||||
mc->reserved = 0;
|
mc->reserved = 0;
|
||||||
|
|
||||||
smp_write_processors(mc);
|
smp_write_processors(mc);
|
||||||
|
mptable_write_buses(mc, NULL, &isa_bus);
|
||||||
/*Bus: Bus ID Type */
|
|
||||||
smp_write_bus(mc, 0, "PCI ");
|
|
||||||
smp_write_bus(mc, 1, "PCI ");
|
|
||||||
smp_write_bus(mc, 2, "PCI ");
|
|
||||||
smp_write_bus(mc, 128, "PCI ");
|
|
||||||
smp_write_bus(mc, 129, "ISA ");
|
|
||||||
|
|
||||||
/* I/O APICs: APIC ID Version State Address */
|
/* I/O APICs: APIC ID Version State Address */
|
||||||
smp_write_ioapic(mc, 2, 17, 0xfec00000);
|
smp_write_ioapic(mc, 2, 17, 0xfec00000);
|
||||||
|
|
||||||
mptable_add_isa_interrupts(mc, 0x81, 0x2, 0);
|
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
|
||||||
|
|
||||||
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
|
||||||
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14);
|
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14);
|
||||||
|
|
Loading…
Reference in New Issue