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Automatically fetch bus information for mptable from 

the device tree, instead of using hardcoded values.

If this changes behaviour, this is either
- a bug in mptable_write_buses(), or
- a bug in the old mptable or device config, that is
  they were inconsistent.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-09-24 18:42:56 +00:00
parent 0a6d1aebf1
commit 20979584fe
9 changed files with 22 additions and 93 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
src/mainboard/tyan/s2735/mptable.c
View File

@ -10,6 +10,7 @@ static void *smp_write_config_table(void *v)
static const char oem[8] = "COREBOOT";
static const char productid[12] = "S2735 ";
struct mp_config_table *mc;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@ -29,15 +30,7 @@ static void *smp_write_config_table(void *v)
mc->reserved = 0;
smp_write_processors(mc);
/*Bus: Bus ID Type*/
smp_write_bus(mc, 0, "PCI ");
smp_write_bus(mc, 1, "PCI ");
smp_write_bus(mc, 2, "PCI ");
smp_write_bus(mc, 3, "PCI ");
smp_write_bus(mc, 4, "PCI ");
smp_write_bus(mc, 5, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
{
@ -58,7 +51,7 @@ static void *smp_write_config_table(void *v)
}
}
}
mptable_add_isa_interrupts(mc, 0x5, 0x8, 0);
mptable_add_isa_interrupts(mc, isa_bus, 0x8, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
*/

13
src/mainboard/tyan/s2850/mptable.c
View File

@ -50,8 +50,7 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "S2850 ";
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8111_1;
unsigned apicid_base;
@ -88,23 +87,15 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
bus_8111_1 = 2;
bus_isa = 3;
}
}
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1

13
src/mainboard/tyan/s2875/mptable.c
View File

@ -48,8 +48,7 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "S2875 ";
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8111_1;
unsigned char bus_8151_1;
@ -89,15 +88,11 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 3;
bus_isa = 4;
}
/* 8151 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
@ -116,11 +111,7 @@ static void *smp_write_config_table(void *v)
}
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1

13
src/mainboard/tyan/s2880/mptable.c
View File

@ -50,8 +50,7 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "S2880 ";
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@ -94,14 +93,11 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@ -128,12 +124,7 @@ static void *smp_write_config_table(void *v)
}
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1

13
src/mainboard/tyan/s4880/mptable.c
View File

@ -48,8 +48,7 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "S4880 ";
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@ -93,14 +92,11 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@ -127,12 +123,7 @@ static void *smp_write_config_table(void *v)
}
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1

13
src/mainboard/tyan/s4882/mptable.c
View File

@ -49,8 +49,7 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "S4882 ";
struct mp_config_table *mc;
unsigned char bus_num;
unsigned char bus_isa;
int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
@ -94,14 +93,11 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
@ -128,12 +124,7 @@ static void *smp_write_config_table(void *v)
}
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
for(bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1

9
src/mainboard/via/epia-n/mptable.c
View File

@ -12,6 +12,7 @@ static void *smp_write_config_table(void *v)
static const char oem[8] = "COREBOOT";
static const char productid[12] = "P4DPE ";
struct mp_config_table *mc;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@ -31,12 +32,8 @@ static void *smp_write_config_table(void *v)
mc->reserved = 0;
smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
/*Bus: Bus ID Type*/
smp_write_bus(mc, 0, "PCI ");
smp_write_bus(mc, 1, "PCI ");
smp_write_bus(mc, 2, "ISA ");
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
{
@ -71,7 +68,7 @@ static void *smp_write_config_table(void *v)
}
}
}
mptable_add_isa_interrupts(mc, 0x2, 0x2, 0);
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x15);

17
src/mainboard/via/pc2500e/mptable.c
View File

@ -29,9 +29,6 @@
#include <stdint.h>
#include "../../../southbridge/via/vt8237r/vt8237r.h"
#define bus_isa 2
static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
@ -39,7 +36,7 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "PC2500 ";
struct mp_config_table *mc;
int bus_num;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@ -59,21 +56,13 @@ static void *smp_write_config_table(void *v)
mc->reserved = 0;
smp_write_processors(mc);
/* Bus: Bus ID Type*/
/* define numbers for pci and isa bus */
for (bus_num = 0; bus_num < bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
}
smp_write_bus(mc, bus_isa, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
/* Now, assemble the table. */
mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
mptable_add_isa_interrupts(mc, isa_bus, VT8237R_APIC_ID, 0);
#define PCI_INT(bus, dev, fn, pin) \
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \

11
src/mainboard/via/vt8454c/mptable.c
View File

@ -33,6 +33,7 @@ static void *smp_write_config_table(void *v)
static const char oem[8] = "COREBOOT";
static const char productid[12] = "VIA VT8454C ";
struct mp_config_table *mc;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
memset(mc, 0, sizeof(*mc));
@ -52,18 +53,12 @@ static void *smp_write_config_table(void *v)
mc->reserved = 0;
smp_write_processors(mc);
/*Bus: Bus ID Type */
smp_write_bus(mc, 0, "PCI ");
smp_write_bus(mc, 1, "PCI ");
smp_write_bus(mc, 2, "PCI ");
smp_write_bus(mc, 128, "PCI ");
smp_write_bus(mc, 129, "ISA ");
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 17, 0xfec00000);
mptable_add_isa_interrupts(mc, 0x81, 0x2, 0);
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14);