mb/google/starmie: Add 3 ms delay to AW37503 Power IC panel timing
Based on the power sequence of the panel [1], the power on T3 sequence VSN to RESET should be larger than 1ms. Because the Power IC descending slope takes 2ms, actual measurement needs 3ms to meet the timing of panel sequence. [1] HX83102-J02_Datasheet_v03.pdf BUG=b:302212730 BRANCH=corsola TEST=emerge-staryu coreboot chromeos-bootimage and boot the panel Change-Id: I488c746d1fcfc165125b0ecccb0bccbb99231b00 Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78185 Reviewed-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com>
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@ -34,6 +34,7 @@ static void mipi_panel_power_on(void)
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gpio_output(GPIO_EN_PP3300_DISP_X, 1);
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mdelay(2);
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gpio_output(GPIO_EN_PP3300_SDBRDG_X, 1);
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mdelay(3);
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} else if (tps65132s_setup(&cfg) != CB_SUCCESS) {
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printk(BIOS_ERR, "Failed to setup tps65132s\n");
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}
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