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mb/google/volteer: disable TBT if no USB4 hardware available 

Implement mainboard_silicon_init_params() to allow for disabling of
TBT root ports if the device does not have usb4 hardware.

Add code to mainboard_memory_init_params() to disable memory-related
settings associated with TBT in cases where no usb4 is available.

BUG=b:167983038
TEST=none

Change-Id: Iab23c07e15f754ca807f128b9edad7fdc9a44b9d
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Nick Vaccaro 2020-10-01 19:06:17 -07:00 committed by Duncan Laurie
parent 799437578a
commit 20be04a153
2 changed files with 23 additions and 0 deletions
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15
src/mainboard/google/volteer/mainboard.c
View File

@ -78,6 +78,21 @@ static void mainboard_chip_init(void *chip_info)
override_pads, override_num); override_pads, override_num);
} }
void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
bool has_usb4;
/* If device doesn't have USB4 hardware, disable tbt */
has_usb4 = (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) ||
fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)));
if (!has_usb4)
memset(params->ITbtPcieRootPortEn,
0,
ARRAY_SIZE(params->ITbtPcieRootPortEn) *
sizeof(*params->ITbtPcieRootPortEn));
}
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {
.init = mainboard_chip_init, .init = mainboard_chip_init,
.enable_dev = mainboard_enable, .enable_dev = mainboard_enable,

8
src/mainboard/google/volteer/romstage.c
View File

@ -27,4 +27,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
mem_cfg->PchHdaEnable = 0; mem_cfg->PchHdaEnable = 0;
meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated); meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated);
/* Disable TBT if no USB4 hardware */
if (!(fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) ||
fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)))) {
mem_cfg->TcssDma0En = 0;
mem_cfg->TcssItbtPcie0En = 0;
mem_cfg->TcssItbtPcie1En = 0;
}
} }