soc/intel/cannonlake: Make EC S0ix notification optional in LPIT
Only call the \_SB.PCI0.LPCB.EC0.S0IX method if it exists. Change-Id: Idf465f8ad7cb016f3ad3d9710b46e35f66f8939b Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34178 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
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@ -15,6 +15,7 @@
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*/
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External(\_SB.MS0X, MethodObj)
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External(\_SB.PCI0.LPCB.EC0.S0IX, MethodObj)
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scope(\_SB)
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{
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@ -34,7 +35,7 @@ scope(\_SB)
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)
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}
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/*
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* Function 1.
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* Function 1 - Get Device Constraints
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*/
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If(Arg2 == 1) {
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Return(Package(5) {
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@ -42,7 +43,7 @@ scope(\_SB)
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)
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}
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/*
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* Function 2.
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* Function 2 - Get Crash Dump Device
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*/
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If(Arg2 == 2) {
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Return(Buffer(One) {
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@ -50,30 +51,38 @@ scope(\_SB)
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)
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}
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/*
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* Function 3.
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* Function 3 - Display Off Notification
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*/
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If(Arg2 == 3) {
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}
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/*
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* Function 4.
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* Function 4 - Display On Notification
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*/
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If(Arg2 == 4) {
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}
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/*
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* Function 5.
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* Function 5 - Low Power S0 Entry Notification
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*/
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If(Arg2 == 5) {
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\_SB.PCI0.LPCB.EC0.S0IX(1)
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/* Inform the EC */
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If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
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\_SB.PCI0.LPCB.EC0.S0IX(1)
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}
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/* provide board level s0ix hook */
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If (CondRefOf (\_SB.MS0X)) {
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\_SB.MS0X(1)
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}
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}
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/*
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* Function 6.
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* Function 6 - Low Power S0 Exit Notification
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*/
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If(Arg2 == 6) {
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\_SB.PCI0.LPCB.EC0.S0IX(0)
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/* Inform the EC */
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If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
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\_SB.PCI0.LPCB.EC0.S0IX(0)
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}
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/* provide board level s0ix hook */
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If (CondRefOf (\_SB.MS0X)) {
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\_SB.MS0X(0)
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