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amd/car: don't apply Fam10h/Fam12h Errata 343 fix to Fam0Fh 

Fixes early fault problem on Fam0Fh introduced in
Change I8e01a4ab68b463efe02c27f589e0b4b719532eb5,
commit 991f18475c.

Change-Id: Id215d2822b78917939c28f7a922a94e02e5d15bf
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: https://review.coreboot.org/12528
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
This commit is contained in:
Jonathan A. Kollasch 2015-11-24 10:15:22 -06:00 committed by Patrick Georgi
parent 905507c379
commit 20d9fb4692
1 changed files with 5 additions and 5 deletions
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10
src/cpu/amd/car/post_cache_as_ram.c
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@ -79,18 +79,18 @@ static void prepare_ramstage_region(void *resume_backup_memory)
print_car_debug(" Done\n"); print_car_debug(" Done\n");
} }
/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */ /* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33
* and RevGuide for Fam12h, Pub#44739 Rev 3.10
*/
static void vErrata343(void) static void vErrata343(void)
{ {
#ifdef BU_CFG2_MSR
msr_t msr; msr_t msr;
unsigned int uiMask = 0xFFFFFFF7; unsigned int uiMask = 0xFFFFFFF7;
msr = rdmsr(BU_CFG2_MSR); msr = rdmsr(BU_CFG2_MSR);
msr.hi &= uiMask; // IcDisSpecTlbWr (bit 35) = 0 msr.hi &= uiMask; // IcDisSpecTlbWr (bit 35) = 0
wrmsr(BU_CFG2_MSR, msr); wrmsr(BU_CFG2_MSR, msr);
#endif
} }
void post_cache_as_ram(void) void post_cache_as_ram(void)
@ -121,8 +121,8 @@ void post_cache_as_ram(void)
prepare_romstage_ramstack(resume_backup_memory); prepare_romstage_ramstack(resume_backup_memory);
/* from here don't store more data in CAR */ /* from here don't store more data in CAR */
if (family < 0x6f) { if (family >= 0x1f && family <= 0x3f) {
/* Family 10h or earlier */ /* Family 10h and 12h, 11h until shown otherwise */
vErrata343(); vErrata343();
} }