mb/portwell/m107/Kconfig: Remove CACHE_MRC_SETTINGS

The CACHE_MRC_SETTINGS option is already selected in SoC Kconfig.

BUG = N/A
TEST = Build and boot Portwell M107

Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Change-Id: I528c582419fb2044f5edfd7a070785489efdf7a6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52154
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frans Hendriks 2021-04-07 11:52:33 +02:00 committed by Patrick Georgi
parent c48cf110dd
commit 20e04efc33
1 changed files with 0 additions and 1 deletions

View File

@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_BRASWELL select SOC_INTEL_BRASWELL
select PCIEXP_L1_SUB_STATE select PCIEXP_L1_SUB_STATE
select HAVE_FSP_BIN select HAVE_FSP_BIN
select CACHE_MRC_SETTINGS
select DISABLE_HPET select DISABLE_HPET
select HAVE_SPD_IN_CBFS select HAVE_SPD_IN_CBFS