src: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

src/arch/arm64/arm_tf.c

@@ -21,6 +21,7 @@
 #include <assert.h>
 #include <bootmem.h>
 #include <cbfs.h>
+#include <console/console.h>
 #include <program_loading.h>
 
 /*

src/arch/riscv/boot.c

@@ -17,7 +17,6 @@
 #include <vm.h>
 #include <arch/boot.h>
 #include <arch/encoding.h>
-#include <console/console.h>
 #include <arch/smp/smp.h>
 #include <mcall.h>
 

src/commonlib/storage/sdhci_adma.c

@@ -20,6 +20,7 @@
 #include <assert.h>
 #include <commonlib/sdhci.h>
 #include <commonlib/storage.h>
+#include <console/console.h>
 #include <delay.h>
 #include <endian.h>
 #include <string.h>

src/cpu/amd/family_10h-family_15h/fidvid.c

@@ -89,6 +89,7 @@ b.-  prep_fid_change(...)
 
  */
 
+#include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <inttypes.h>
 #include <northbridge/amd/amdht/AsPsDefs.h>

src/cpu/amd/family_10h-family_15h/init_cpus.c

@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <device/pci_ops.h>
 #include "init_cpus.h"

src/cpu/amd/family_10h-family_15h/init_cpus.h

@@ -17,7 +17,6 @@
 #define INIT_CPUS_H
 
 #include <stdlib.h>
-#include <console/console.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/msr.h>

src/drivers/amd/agesa/def_callouts.c

@@ -15,6 +15,7 @@
  */
 
 #include <cbfs.h>
+#include <console/console.h>
 #include <spd_bin.h>
 #include <string.h>
 

src/drivers/amd/agesa/heapmanager.c

@@ -20,6 +20,7 @@
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 
 #include <arch/acpi.h>
+#include <console/console.h>
 #include <string.h>
 
 /* BIOS_HEAP_START_ADDRESS is only for cold boots. */

src/drivers/amd/agesa/oem_s3.c

@@ -17,6 +17,7 @@
 #include <spi_flash.h>
 #include <string.h>
 #include <cbmem.h>
+#include <console/console.h>
 #include <program_loading.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <AGESA.h>

src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c

@@ -14,6 +14,7 @@
  */
 
 #include <assert.h>
+#include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/lapic.h>

src/drivers/spi/spi_flash.c

@@ -10,6 +10,7 @@
 #include <arch/early_variables.h>
 #include <assert.h>
 #include <boot_device.h>
+#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <stdlib.h>
 #include <string.h>

src/lib/generic_dump_spd.c

@@ -3,6 +3,8 @@
  * It should go away either there or here, depending what fits better.
  */
 
+#include <console/console.h>
+
 static void dump_spd_registers(const struct mem_controller *ctrl)
 {
 	int i;

src/mainboard/amd/bettong/BiosCallOuts.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <AGESA.h>

src/mainboard/bap/ode_e20XX/BiosCallOuts.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <AGESA.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <northbridge/amd/agesa/state_machine.h>

src/mainboard/bap/ode_e21XX/BiosCallOuts.c

@@ -14,6 +14,7 @@
  */
 
 #include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <FchPlatform.h>
 #include <stdlib.h>

src/mainboard/biostar/am1ml/BiosCallOuts.c

@@ -16,6 +16,7 @@
 
 #include <device/azalia.h>
 #include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <FchPlatform.h>

src/mainboard/foxconn/g41s-k/romstage.c

@@ -16,6 +16,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>
 #include <device/pci_ops.h>

src/mainboard/google/poppy/variants/nami/mainboard.c

@@ -19,6 +19,7 @@
 #include <cbfs.h>
 #include <chip.h>
 #include <commonlib/cbfs_serialized.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <drivers/intel/gma/opregion.h>
 #include <ec/google/chromeec/ec.h>

src/mainboard/lippert/frontrunner-af/BiosCallOuts.c

@@ -14,6 +14,7 @@
  */
 
 #include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <SB800.h>
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>

src/mainboard/lippert/toucan-af/BiosCallOuts.c

@@ -14,6 +14,7 @@
  */
 
 #include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <SB800.h>
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>

src/mainboard/pcengines/apu1/BiosCallOuts.c

@@ -13,11 +13,13 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <AGESA.h>
 #include <spd_bin.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <SB800.h>
 #include <stdlib.h>
+
 #include "gpio_ftns.h"
 
 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);

src/mainboard/pcengines/apu2/BiosCallOuts.c

@@ -14,6 +14,7 @@
  */
 
 #include <AGESA.h>
+#include <console/console.h>
 #include <spd_bin.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <FchPlatform.h>

src/northbridge/amd/agesa/family14/state_machine.c

@@ -15,17 +15,16 @@
 
 #include <Porting.h>
 #include <AGESA.h>
-
 #include <arch/io.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <smp/node.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
-
 #include <sb_cimx.h>
 
 void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)

src/northbridge/amd/amdmct/mct/mct_d.c

@@ -34,8 +34,10 @@
  */
 
 #include <string.h>
+#include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <device/pci_ops.h>
+
 #include "mct_d.h"
 
 static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat,

src/northbridge/amd/amdmct/mct/mctdqs_d.c

@@ -13,9 +13,11 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <cpu/x86/cr.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
+
 #include "mct_d.h"
 
 static void CalcEccDQSPos_D(struct MCTStatStruc *pMCTstat,

src/northbridge/amd/amdmct/mct/mcttmrl.c

@@ -13,8 +13,10 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <cpu/x86/cr.h>
 #include <cpu/amd/msr.h>
+
 #include "mct_d.h"
 
 /*

src/northbridge/amd/pi/agesawrapper.c

@@ -17,6 +17,7 @@
 #include <cbfs.h>
 #include <cbmem.h>
 #include <delay.h>
+#include <console/console.h>
 #include <cpu/x86/mtrr.h>
 #include <FchPlatform.h>
 #include <heapManager.h>

src/northbridge/via/vx900/memmap.c

@@ -17,11 +17,12 @@
 
 #define __SIMPLE_DEVICE__
 
-#include "vx900.h"
-
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <cbmem.h>
+#include <console/console.h>
+
+#include "vx900.h"
 
 #define MCU PCI_DEV(0, 0, 3)
 

src/northbridge/via/vx900/pci_util.c

@@ -14,6 +14,8 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
+
 #include "vx900.h"
 
 #ifdef __SIMPLE_DEVICE__

src/soc/amd/common/block/pi/agesawrapper.c

@@ -16,6 +16,7 @@
 
 #include <arch/acpi.h>
 #include <cbmem.h>
+#include <console/console.h>
 #include <timestamp.h>
 #include <amdblocks/s3_resume.h>
 #include <amdblocks/agesawrapper.h>

src/soc/amd/common/block/pi/def_callouts.c

@@ -15,6 +15,7 @@
  */
 
 #include <cbfs.h>
+#include <console/console.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
 #include <timer.h>

src/soc/amd/common/block/pi/refcode_loader.c

@@ -16,6 +16,7 @@
 #include <arch/acpi.h>
 #include <cbfs.h>
 #include <cbmem.h>
+#include <console/console.h>
 #include <rmodule.h>
 #include <stage_cache.h>
 #include <amdblocks/agesawrapper.h>

src/soc/amd/stoneyridge/BiosCallOuts.c

@@ -18,15 +18,16 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <amdblocks/BiosCallOuts.h>
+#include <console/console.h>
 #include <soc/southbridge.h>
 #include <soc/pci_devs.h>
 #include <stdlib.h>
-
 #include <amdblocks/agesawrapper.h>
 #include <amdblocks/dimm_spd.h>
-#include "chip.h"
 #include <amdblocks/car.h>
 
+#include "chip.h"
+
 void __weak platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset) {}
 
 AGESA_STATUS agesa_fch_initreset(uint32_t Func, uintptr_t FchData,

src/soc/amd/stoneyridge/ramtop.c

@@ -17,6 +17,7 @@
 
 #include <assert.h>
 #include <stdint.h>
+#include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>

src/soc/amd/stoneyridge/smbus_spd.c

@@ -14,6 +14,7 @@
  */
 
 #include <amdblocks/agesawrapper.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <soc/southbridge.h>

src/soc/intel/apollolake/acpi.c

@@ -18,6 +18,7 @@
 
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
+#include <console/console.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci_ops.h>
@@ -34,6 +35,7 @@
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
 #include <string.h>
+
 #include "chip.h"
 
 #define CSTATE_RES(address_space, width, offset, address)		\

src/soc/intel/apollolake/uart.c

@@ -21,6 +21,7 @@
  */
 
 #include <assert.h>
+#include <console/console.h>
 #include <intelblocks/uart.h>
 #include <soc/gpio.h>
 #include <soc/pci_devs.h>

src/soc/intel/cannonlake/uart.c

@@ -14,6 +14,7 @@
  */
 
 #include <assert.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpss.h>

src/soc/intel/common/block/acpi/acpi.c

@@ -20,6 +20,7 @@
 #include <bootstate.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
+#include <console/console.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>

src/soc/intel/common/block/cpu/mp_init.c

@@ -15,6 +15,7 @@
 
 #include <assert.h>
 #include <bootstate.h>
+#include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>

src/soc/intel/common/block/gpio/gpio.c

@@ -13,7 +13,9 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
+
 #include <assert.h>
+#include <console/console.h>
 #include <intelblocks/gpio.h>
 #include <gpio.h>
 #include <intelblocks/itss.h>

src/soc/intel/denverton_ns/acpi.c

@@ -26,7 +26,7 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <cbmem.h>
-
+#include <console/console.h>
 #include <intelblocks/acpi.h>
 #include <soc/acpi.h>
 #include <soc/cpu.h>

src/soc/intel/denverton_ns/include/soc/hob_mem.h

@@ -19,6 +19,7 @@
 #ifndef _DENVERTON_NS_HOB_MEM_H
 #define _DENVERTON_NS_HOB_MEM_H
 
+#include <console/console.h>
 #include <fsp/util.h>
 
 void soc_display_fsp_smbios_memory_info_hob(

src/soc/intel/fsp_baytrail/i2c.c

@@ -15,6 +15,7 @@
 
 #include <device/pci.h>
 #include <device/pci_ops.h>
+#include <console/console.h>
 #include <soc/baytrail.h>
 #include <soc/pci_devs.h>
 #include <soc/iosf.h>

src/soc/intel/icelake/uart.c

@@ -14,6 +14,7 @@
  */
 
 #include <assert.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpss.h>

src/soc/intel/quark/acpi.c

@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <soc/acpi.h>
 #include <soc/ramstage.h>
 

src/soc/mediatek/common/spi.c

@@ -15,6 +15,7 @@
 
 #include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <endian.h>
 #include <stdlib.h>
 #include <soc/pll.h>

src/soc/mediatek/mt8173/dramc_pi_calibration_api.c

@@ -15,6 +15,7 @@
 
 #include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <stdlib.h>
 #include <soc/addressmap.h>
 #include <soc/dramc_common.h>

src/soc/mediatek/mt8173/i2c.c

@@ -14,6 +14,7 @@
  */
 
 #include <assert.h>
+#include <console/console.h>
 #include <delay.h>
 #include <device/i2c_simple.h>
 #include <string.h>

src/soc/mediatek/mt8173/pmic_wrap.c

@@ -15,6 +15,7 @@
 
 #include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <delay.h>
 #include <soc/infracfg.h>
 #include <soc/pmic_wrap.h>

src/soc/mediatek/mt8183/mt6358.c

@@ -14,6 +14,7 @@
  */
 
 #include <assert.h>
+#include <console/console.h>
 #include <soc/pmic_wrap.h>
 #include <soc/mt6358.h>
 

src/soc/nvidia/tegra210/funitcfg.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>

src/soc/nvidia/tegra210/ramstage.c

@@ -15,6 +15,7 @@
 
 #include <arch/lib_helpers.h>
 #include <arch/stages.h>
+#include <console/console.h>
 #include <device/mmio.h>
 #include <gic.h>
 #include <soc/addressmap.h>

src/soc/rockchip/rk3288/crypto.c

@@ -15,6 +15,7 @@
 
 #include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <delay.h>
 #include <soc/addressmap.h>
 #include <soc/soc.h>

src/southbridge/amd/agesa/hudson/resume.c

@@ -18,7 +18,7 @@
 #include <device/device.h>
 #include "hudson.h"
 #include <AGESA.h>
-
+#include <console/console.h>
 #include <northbridge/amd/agesa/state_machine.h>
 
 extern FCH_DATA_BLOCK InitEnvCfgDefault;

src/southbridge/amd/agesa/hudson/smbus_spd.c

@@ -15,12 +15,11 @@
 
 #include <device/pci_def.h>
 #include <device/device.h>
-
+#include <console/console.h>
 /* warning: Porting.h includes an open #pragma pack(1) */
 #include <Porting.h>
 #include <AGESA.h>
 #include <amdlib.h>
-
 #include <northbridge/amd/agesa/dimmSpd.h>
 
 /*-----------------------------------------------------------------------------

src/southbridge/amd/cimx/sb900/cfg.c

@@ -13,12 +13,12 @@
  * GNU General Public License for more details.
  */
 
-
+#include <console/console.h>
 #include <string.h>
+
 #include "SbPlatform.h"
 #include "platform_cfg.h"
 
-
 /**
  * @brief South Bridge CIMx configuration
  *

src/southbridge/amd/pi/hudson/smbus_spd.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
 
@@ -20,7 +21,6 @@
 #include <Porting.h>
 #include <AGESA.h>
 #include <amdlib.h>
-
 #include <northbridge/amd/pi/dimmSpd.h>
 
 /*-----------------------------------------------------------------------------

src/southbridge/broadcom/bcm5785/early_smbus.c

@@ -15,7 +15,9 @@
  */
 
 #include <arch/io.h>
+#include <console/console.h>
 #include <device/pci_ops.h>
+
 #include "smbus.h"
 
 #define SMBUS_IO_BASE 0x1000