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intel/*/acpi: Increase range length of MCHBAR buffer to 32 kB 

Linux kernel 2.6.31 reports the warning below on Intel Ivy Bridge (with
FSP).

	resource map sanity check conflict: 0xfed10000 0xfed17fff 0xfed10000 0xfed13fff pnp 00:01

Since Sandy Bridge the length of the MCHBAR is 32 kB and it is already
used that way in other places.

	$ more src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl
	[…]
	OperationRegion (MCHB, SystemMemory, DEFAULT_MCHBAR, 0x8000)
	[…]

So instead of 16 kB specify that 32 kB are decoded in that memory
range for Intel Sandy Bridge, Ivy Bridge and Haswell.

(Linux kernel 3.10 does not warn about that.)

Change-Id: Ie7a9356d9051c807833df85e4a806e5a9498473f
Reported-by: Norwich in #coreboot on <irc.freenode.org>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5192
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Werner Zeh
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Paul Menzel 2014-02-11 10:38:27 +01:00 committed by Marc Jones
parent e3f75f8eca
commit 20f83d5656
4 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/northbridge/intel/fsp_sandybridge/acpi/sandybridge.asl
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@ -30,7 +30,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() { Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00008000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000) Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)

2
src/northbridge/intel/haswell/acpi/haswell.asl
View File

@ -30,7 +30,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() { Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00008000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000) Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)

2
src/northbridge/intel/nehalem/acpi/nehalem.asl
View File

@ -30,7 +30,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() { Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00008000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000) Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)

2
src/northbridge/intel/sandybridge/acpi/sandybridge.asl
View File

@ -30,7 +30,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() { Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00008000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000) Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)