soc/intel/skylake: config ISH in SOC side

Config ISH in SOC side by checking if ISH device is turned on.

"IshEnable" is not needed anymore since ISH device on/off will tell
if ISH should be enabled or not. "IshEnable" will be removed from chip.h
in separate CL.

Atlas board specific ISH setting is needed, which is committed in
separate CL.

BUG=b:79244403
BRANCH=none
TEST=Verified on Atlas board with ISH rework. ISH log showed on console.

Change-Id: I3fc8648b3e6551497617ef1ebd2889245cdd31c3
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://review.coreboot.org/26485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
li feng 2018-05-22 12:49:53 -07:00 committed by Patrick Georgi
parent f1114d8918
commit 2106638ec2
2 changed files with 16 additions and 2 deletions

View File

@ -138,7 +138,14 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->ScsEmmcEnabled = config->ScsEmmcEnabled;
params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
params->ScsSdCardEnabled = config->ScsSdCardEnabled;
params->IshEnable = 0;
/* Enable ISH if device is on */
dev = dev_find_slot(0, PCH_DEVFN_ISH);
if (dev)
params->IshEnable = dev->enabled;
else
params->IshEnable = 0;
params->EnableAzalia = config->EnableAzalia;
params->IoBufferOwnership = config->IoBufferOwnership;
params->DspEnable = config->DspEnable;

View File

@ -335,7 +335,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->ScsEmmcEnabled = config->ScsEmmcEnabled;
params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
params->ScsSdCardEnabled = config->ScsSdCardEnabled;
params->PchIshEnable = config->IshEnable;
/* If ISH is enabled, enable ISH elements */
dev = dev_find_slot(0, PCH_DEVFN_ISH);
if (dev)
params->PchIshEnable = dev->enabled;
else
params->PchIshEnable = 0;
params->PchHdaEnable = config->EnableAzalia;
params->PchHdaIoBufferOwnership = config->IoBufferOwnership;
params->PchHdaDspEnable = config->DspEnable;