From 21452e15bb58bb1539a7515576aed7210dd4e4b2 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 12 Jul 2022 09:59:53 +0000 Subject: [PATCH] mb/google/rex: Program EC ranges (host cmd and memory map) This patch adds chip config entries for EC host cmd and memory map ranges. BUG=b:224325352 TEST=Able to build Google/Rex. Signed-off-by: Subrata Banik Change-Id: I84a3b128a05c013d659e490a01198955ef383f83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65765 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- .../google/rex/variants/baseboard/rex/devicetree.cb | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index f9eb12fe7c..d803670ca1 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -1,5 +1,11 @@ chip soc/intel/meteorlake + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f + register "gen1_dec" = "0x00fc0801" + register "gen2_dec" = "0x000c0201" + # EC memory map range is 0x900-0x9ff + register "gen3_dec" = "0x00fc0901" + register "serial_io_uart_mode" = "{ [PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART1] = PchSerialIoDisabled,