util/superiotool: Add initial support for Fintek F71869ED.
Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf Practically the same as F71869AD, just another ID (0x1408). Tested on actual hardware, Jetway NC9C-550-LF. Update: Fixed F71869ED based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5380 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
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@ -114,3 +114,4 @@ Ulf Jordan <jordan@chalmers.se>
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Urja Rannikko <urjaman@gmail.com>
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Uwe Hermann <uwe@hermann-uwe.de>
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Ward Vandewege <ward@gnu.org>
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Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
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@ -4,6 +4,7 @@
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* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
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* Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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* Copyright (C) 2014 Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -128,6 +129,52 @@ static const struct superio_registers reg_table[] = {
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{0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
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0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
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0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
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{EOT}}},
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{0x1408, "F71869E/ED", {
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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{0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
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0x2a,0x2b,0x2d,EOT},
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{0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f,
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0x07,0x0f,0x28,EOT}},
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{0x00, "FDC",
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
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{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
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{0x01, "UART1",
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x01,0x03,0xf8,0x04,0x00,EOT}},
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{0x02, "UART2",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
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{0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
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{0x03, "Parallel port",
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{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
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{0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
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{0x04, "Hardware Monitor",
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{0x30,0x60,0x61,0x70,EOT},
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{0x01,0x02,0x95,0x00,EOT}},
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{0x05, "KBC",
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{0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
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{0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
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{0x06, "GPIO",
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
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0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
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0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
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0x90,0x91,0x92,0x93,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
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NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
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0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
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0x00,0x3f,NANA,0x00,EOT}},
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{0x07, "WDT",
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{0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
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{0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
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{0x0a, "PME, ACPI, and EUP Power Saving",
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{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
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0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
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0xf8,0xf9,0xfe,EOT},
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{0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
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0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86,
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0x00,0x00,0x00,EOT}},
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{EOT}}},
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{0x2307, "F71889", {
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/* We assume reserved bits are read as 0. */
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{NOLDN, NULL,
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@ -405,7 +452,7 @@ void probe_idregs_fintek(uint16_t port)
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}
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printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
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get_superio_name(reg_table, did), vid, did, port);
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get_superio_name(reg_table, did), vid, did, port);
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chip_found = 1;
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dump_superio("Fintek", reg_table, port, did, LDN_SEL);
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@ -436,7 +483,7 @@ void probe_idregs_fintek_alternative(uint16_t port)
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}
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printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
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get_superio_name(reg_table, did), vid, did, port);
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get_superio_name(reg_table, did), vid, did, port);
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chip_found = 1;
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dump_superio("Fintek", reg_table, port, did, LDN_SEL);
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