- Fix config.g and the hdama config so everthing builds again.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
parent
688af4be2b
commit
216525d1fd
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@ -67,7 +67,8 @@ struct device {
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unsigned long rom_address;
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struct device_operations *ops;
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struct chip *chip;
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struct chip_control *chip_control;
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void *chip_info;
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};
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extern struct device dev_root; /* root bus */
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@ -9,11 +9,17 @@ enum device_path_type {
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DEVICE_PATH_PNP,
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DEVICE_PATH_I2C,
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DEVICE_PATH_APIC,
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DEVICE_PATH_PCI_DOMAIN,
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DEVICE_APIC_CLUSTER,
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};
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struct pci_domain_path
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{
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unsigned domain;
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};
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struct pci_path
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{
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unsigned bus;
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unsigned devfn;
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};
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@ -33,13 +39,21 @@ struct apic_path
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unsigned apic_id;
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};
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struct apic_cluster_path
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{
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unsigned cluster;
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};
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struct device_path {
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enum device_path_type type;
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union {
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struct pci_path pci;
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struct pnp_path pnp;
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struct i2c_path i2c;
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struct apic_path apic;
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struct pci_path pci;
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struct pnp_path pnp;
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struct i2c_path i2c;
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struct apic_path apic;
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struct pci_domain_path pci_domain;
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struct apic_cluster_path apic_cluster;
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} u;
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};
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@ -16,7 +16,6 @@ end
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##
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default CONFIG_ROM_STREAM = 1
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##
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## Compute where this copy of linuxBIOS will start in the boot rom
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@ -33,72 +32,216 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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arch i386 end
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##
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## Build the objects we have code for in this directory.
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##
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driver mainboard.o
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if HAVE_MP_TABLE object mptable.o end
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if HAVE_PIRQ_TABLE object irq_tables.o end
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#object reset.o
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##
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## Romcc output
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##
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makerule ./failover.E
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depends "$(MAINBOARD)/failover.c"
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action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
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end
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makerule ./failover.inc
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depends "./failover.E ./romcc"
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action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"
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end
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makerule ./auto.E
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depends "$(MAINBOARD)/auto.c option_table.h "
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action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
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end
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makerule ./auto.inc
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depends "./auto.E ./romcc"
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action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc"
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end
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##
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## Build our 16 bit and 32 bit linuxBIOS entry code
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##
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mainboardinit cpu/x86/16bit/entry16.inc
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mainboardinit cpu/x86/32bit/entry32.inc
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ldscript /cpu/x86/16bit/entry16.lds
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ldscript /cpu/x86/32bit/entry32.lds
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##
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## Build our reset vector (This is where linuxBIOS is entered)
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##
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if USE_FALLBACK_IMAGE
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mainboardinit cpu/x86/16bit/reset16.inc
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ldscript /cpu/x86/16bit/reset16.lds
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else
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mainboardinit cpu/x86/32bit/reset32.inc
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ldscript /cpu/x86/32bit/reset32.lds
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end
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### Should this be in the northbridge code?
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mainboardinit arch/i386/lib/cpu_reset.inc
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##
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## Include an id string (For safe flashing)
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##
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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###
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### This is the early phase of linuxBIOS startup
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### Things are delicate and we test to see if we should
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### failover to another image.
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###
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if USE_FALLBACK_IMAGE
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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###
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### O.k. We aren't just an intermediary anymore!
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###
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##
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## Setup RAM
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##
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mainboardinit cpu/x86/fpu/enable_fpu.inc
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mainboardinit cpu/x86/mmx/enable_mmx.inc
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mainboardinit cpu/x86/sse/enable_sse.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/sse/disable_sse.inc
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mainboardinit cpu/x86/mmx/disable_mmx.inc
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##
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## Include the secondary Configuration files
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##
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dir /pc80
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config chip.h
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# sample config for arima/hdama
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chip northbridge/amd/amdk8
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print "HI MOM!\n"
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device pnp cf8.0 on # cf8 config
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print "HI MOM!\n"
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device pci 18.0 on # northbridge
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print "HI MOM!\n"
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device pci_domain 0 on
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device pci 18.0 on # northbridge
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# devices on link 0, link 0 == LDT 0
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chip southbridge/amd/amd8131
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print "SOUTH\n"
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# the on/off keyword is mandatory
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device pci 0.0 on end
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print "SOUTH2\n"
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device pci 0.1 on end
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print "SOUTH3\n"
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device pci 1.0 on end
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print "SOUTH4\n"
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device pci 1.1 on end
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end
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chip southbridge/amd/amd8111
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print "NEXT SOUTH\n"
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# this "device pci 0.0" is the parent the next one
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# PCI bridge
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device pci 0.0 on
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# this "device pci 0.0" is a child of the
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# previous one
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# devices behind the bridge
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device pci 0.0 on end
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device pci 0.1 on end
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device pci 0.2 on end
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# the device statement can span across multiple
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# lines too
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device pci 1.0
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off
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end
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device pci 1.0 off end
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end
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device pci 1.0 on
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chip superio/NSC/pc87360
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device pnp 2e.3 on
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io 0x60 = 0x3f8
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device pnp 2e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.2 off # Com 2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.3 on # Com 1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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end
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device pnp 2e.4 off end # SWC
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device pnp 2e.5 off end # Mouse
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device pnp 2e.6 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end
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device pnp 2e.7 off end # GPIO
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device pnp 2e.8 off end # ACB
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device pnp 2e.9 off end # FSCM
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device pnp 2e.a off end # WDT
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end
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end
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device pci 1.1 on end
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device pci 1.2 off end
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device pci 1.3 off end
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device pci 1.5 on end
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device pci 1.2 on end
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device pci 1.3 on
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chip drivers/generic/generic
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#phillips pca9545 smbus mux
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device i2c 70 on end
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# analog_devices adm1026
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chip drivers/generic/generic
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device i2c 2c on end
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end
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device i2c 70 on end
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device i2c 70 on end
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device i2c 70 on end
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end
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chip drivers/generic/generic link 4 #dimm 0-0-0
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device i2c 50 on end
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end
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chip drivers/generic/generic link 4 #dimm 0-0-1
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device i2c 51 on end
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end
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chip drivers/generic/generic link 4 #dimm 0-1-0
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device i2c 52 on end
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end
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chip drivers/generic/generic link 4 #dimm 0-1-1
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device i2c 53 on end
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end
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chip drivers/generic/generic link 4 #dimm 1-0-0
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device i2c 54 on end
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end
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chip drivers/generic/generic link 4 #dimm 1-0-1
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device i2c 55 on end
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end
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chip drivers/generic/generic link 4 #dimm 1-1-0
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device i2c 56 on end
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end
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chip drivers/generic/generic link 4 #dimm 1-1-1
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device i2c 57 on end
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end
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end
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device pci 1.5 off end
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device pci 1.6 on end
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end
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end # device pci 18.0
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device pci 18.0 on
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# some non-existence devices on link 1
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device pci 18.0 on end # LDT1
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device pci 18.0 on end # LDT2
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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chip northbridge/amd/amdk8
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device pci 19.0 on end
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device pci 19.0 on end
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device pci 19.0 on end
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device pci 19.1 on end
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device pci 19.2 on end
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device pci 19.3 on end
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end
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device pci 18.0 on
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# some non-existence devices on link 2
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end
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device apic_cluster 0 on
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chip cpu/amd/socket_940
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device apic 0 on end
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end
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device pci 18.1
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# empty
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chip cpu/amd/socket_940
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device apic 1 on end
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end
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device pci 18.2
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# empty
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end
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device pci 18.3
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# empty
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end
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end # device pnp
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end
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end
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@ -53,6 +53,9 @@ default HAVE_FALLBACK_BOOT=1
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##
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default HAVE_HARD_RESET=1
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##
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## Funky hard reset implementation
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##
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default HARD_RESET_BUS=1
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default HARD_RESET_DEVICE=4
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default HARD_RESET_FUNCTION=0
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@ -121,4 +124,11 @@ default HEAP_SIZE=0x4000
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##
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default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default _RAMBASE=0x00004000
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##
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## Load the payload from the ROM
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##
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default CONFIG_ROM_STREAM = 1
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end
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@ -1,3 +1,4 @@
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# -*- python -*-
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import sys
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import os
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import re
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@ -616,6 +617,13 @@ class partobj:
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# Path to the device
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self.path = ""
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# Resources of the device
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self.resoruce = ""
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self.resources = 0
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# Enabled state of the device
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self.enabled = 1
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# Link from parent device
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if ((link < 0) or (link > 16)):
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fatal("Invalid link")
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@ -630,7 +638,7 @@ class partobj:
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% (self.type_name, self.instance)
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else:
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self.instance_name = instance_name
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self.chipinfo_name = "%s_config" % self.instance_name
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self.chipinfo_name = "%s_info_%d" % (self.instance_name, self.instance)
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# Link this part into the tree
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if (parent and (part != 'arch')):
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@ -704,6 +712,15 @@ class partobj:
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parent = parent.parent
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fatal("Device %s has no chip parent; this is a config file error" % self.type_name)
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def firstsiblingdevice(self):
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"""Find the first device in the sibling link."""
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sibling = self.siblings
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while(sibling):
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if (sibling.chip_or_device == 'device'):
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return sibling
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else:
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sibling = sibling.children
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return 0
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def gencode(self, file, pass_num):
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"""Generate static initalizer code for this part. Two passes
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@ -721,7 +738,7 @@ class partobj:
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return
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# This is pass the second, which is pass number 1
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# this is really just a case statement ...
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if ((self.instance) and (self.chip_or_device == 'chip')):
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if ((self.instance) and (self.chip_or_device == 'chip') and (self.chipconfig)):
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debug.info(debug.gencode, "gencode: chipconfig(%d)" % \
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self.instance)
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file.write("struct %s_config %s" % (self.type_name ,\
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@ -757,32 +774,39 @@ class partobj:
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file.write("\t.ops = &default_dev_ops_root,\n")
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file.write("\t.bus = &dev_root.link[0],\n")
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file.write("\t.path = { .type = DEVICE_PATH_ROOT },\n")
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file.write("\t.enable = 1\n\t.links = 1\n")
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file.write("\t.enabled = 1,\n\t.links = 1,\n")
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file.write("\t.link = {\n\t\t[0] = {\n")
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file.write("\t\t\t.dev=&dev_root,\n\t\t\t.link = 0,\n")
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file.write("\t\t\t.children = %s,\n" % self.firstchilddevice().instance_name)
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file.write("\t\t\t.children = &%s,\n" % self.firstchilddevice().instance_name)
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file.write("\t\t},\n")
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file.write("\t},\n")
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file.write("\t.chip_control = &%s_control,\n" % self.type_name)
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file.write("\t.chip_info = &%s_info_%s,\n" % (self.type_name, self.instance))
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if (self.chipconfig != 0):
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file.write("\t.chip_control = &%s_control,\n" % self.type_name)
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file.write("\t.chip_info = &%s_info_%s,\n" % (self.type_name, self.instance))
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file.write("};\n")
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return
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file.write("struct device %s = {\n" % self.instance_name)
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file.write("\t.ops = 0,\n")
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file.write("\t.bus = &%s.link[0],\n" % self.firstparentdevice().instance_name)
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file.write("\t%s,\n" % self.path)
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file.write("\t.links = 1\n")
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file.write("\t.path = {%s},\n" % self.path)
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file.write("\t.enabled = %d,\n" % self.enabled)
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if (self.resources):
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file.write("\t.resources = %d,\n" % self.resources)
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file.write("\t.resource = {%s\n\t },\n" % self.resource)
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file.write("\t.links = 1,\n")
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file.write("\t.link = {\n\t\t[0] = {\n")
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file.write("\t\t\t.dev=&%s,\n\t\t\t.link = 0,\n" % self.instance_name)
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if (self.firstchilddevice()):
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file.write("\t\t\t.children = &%s,\n" % self.firstchilddevice().instance_name)
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file.write("\t\t},\n")
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file.write("\t},\n")
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if (self.siblings):
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file.write("\t.sibling = %s,\n" % self.siblings.instance_name)
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file.write("\t.chip_control = &%s_control,\n" % self.firstparentchip().type_name)
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file.write("\t.chip_info = &%s_info_%s,\n" % (self.firstparentchip().type_name, self.firstparentchip().instance))
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sibling = self.firstsiblingdevice();
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if (sibling):
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file.write("\t.sibling = &%s,\n" % sibling.instance_name)
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if (self.chipconfig != 0):
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file.write("\t.chip_control = &%s_control,\n" % self.firstparentchip().type_name)
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file.write("\t.chip_info = &%s_info_%s,\n" % (self.firstparentchip().type_name, self.firstparentchip().instance))
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file.write("};\n")
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return
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@ -790,8 +814,8 @@ class partobj:
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file.write("\t/* %s %s */\n" % (self.part, self.dir))
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file.write("\t.link = %d,\n" % (self.link))
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if (self.path != ""):
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file.write("\t.path = { %s\n\t},\n" % (self.path) )
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# if (self.path != ""):
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# file.write("\t.path = { %s\n\t},\n" % (self.path) )
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if (self.siblings):
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debug.info(debug.gencode, "gencode: siblings(%d)" \
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% self.siblings.instance)
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@ -835,56 +859,61 @@ class partobj:
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value = dequote(value)
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setdict(self.registercode, field, value)
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|
||||
def set_enabled(self, enabled):
|
||||
self.enabled = enabled
|
||||
|
||||
def start_resources(self):
|
||||
self.path = "%s, .resource={" % (self.path)
|
||||
self.resource = ""
|
||||
self.resources = 0
|
||||
|
||||
def end_resources(self):
|
||||
self.path = "%s}" % (self.path)
|
||||
self.resource = "%s" % (self.resource)
|
||||
|
||||
def add_resource(self, type, index, value):
|
||||
""" Add a resource to a device """
|
||||
self.path = "%s\n\t\t\t{ .flags=%s, .index=0x%x, .base=0x%x}," % (self.path, type, index, value)
|
||||
self.resource = "%s\n\t\t{ .flags=%s, .index=0x%x, .base=0x%x}," % (self.resource, type, index, value)
|
||||
self.resources = self.resources + 1
|
||||
|
||||
|
||||
|
||||
def addpcipath(self, enable, bus, slot, function):
|
||||
def addpcipath(self, slot, function):
|
||||
""" Add a relative pci style path from our parent to this device """
|
||||
if ((bus < 0) or (bus > 255)):
|
||||
fatal("Invalid bus")
|
||||
if ((slot < 0) or (slot > 0x1f)):
|
||||
fatal("Invalid device id")
|
||||
if ((function < 0) or (function > 7)):
|
||||
fatal("Invalid function")
|
||||
self.path = "%s\n\t\t .enabled = %d, .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .bus = 0x%x, .devfn = PCI_DEVFN(0x%x,%d)}}" % (self.path, enable, bus, slot, function)
|
||||
self.path = ".type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x%x,%d)}}" % (slot, function)
|
||||
|
||||
def addpnppath(self, enable, port, device):
|
||||
def addpnppath(self, port, device):
|
||||
""" Add a relative path to a pnp device hanging off our parent """
|
||||
if ((port < 0) or (port > 65536)):
|
||||
fatal("Invalid port")
|
||||
if ((device < 0) or (device > 0xff)):
|
||||
fatal("Invalid device")
|
||||
self.path = "%s\n\t\t.enabled = %d, .path={.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x%x, .device = 0x%x }}" % (self.path, enable, port, device)
|
||||
self.path = ".type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x%x, .device = 0x%x }}" % (port, device)
|
||||
|
||||
def addi2cpath(self, enable, device):
|
||||
def addi2cpath(self, device):
|
||||
""" Add a relative path to a i2c device hanging off our parent """
|
||||
if ((device < 0) or (device > 0x7f)):
|
||||
fatal("Invalid device")
|
||||
self.path = "%s\n\t\t .enabled = %d, .path = {.type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x%x }} " % (self.path, enable, device)
|
||||
self.path = ".type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x%x }}" % (device)
|
||||
|
||||
def addapicpath(self, enable, apic_id):
|
||||
def addapicpath(self, apic_id):
|
||||
""" Add a relative path to a cpu device hanging off our parent """
|
||||
if ((apic_id < 0) or (apic_id > 255)):
|
||||
fatal("Invalid device")
|
||||
self.path = "%s\n\t\t .enabled = %d, .path = {.type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x%x }} " % (self.path, enable, apic_id)
|
||||
self.path = ".type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x%x }}" % (apic_id)
|
||||
|
||||
def addpci_domainpath(self, enable, pci_domain):
|
||||
def addpci_domainpath(self, pci_domain):
|
||||
""" Add a pci_domain number to a chip """
|
||||
if ((pci_domain < 0) or (pci_domain > 0xffff)):
|
||||
fatal("Invalid pci_domain: 0x%x is out of the range 0 to 0xffff" % pci_domain)
|
||||
self.path = "%s\n\t\t .enabled = %d, .path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .pci_domain = 0x%x }} " % (self.path, enable, pci_domain)
|
||||
self.path = ".type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x%x }}" % (pci_domain)
|
||||
|
||||
def addapic_cluster(self, cluster):
|
||||
""" Add a pci_domain number to a chip """
|
||||
if ((cluster < 0) or (cluster > 15)):
|
||||
fatal("Invalid apic cluster: %d is out of the range 0 to ff" % cluster)
|
||||
self.path = ".type=DEVICE_PATH_APIC_CLUSTER,.u={.apic_cluster={ .cluster = 0x%x }}" % (cluster)
|
||||
|
||||
|
||||
|
||||
def usesoption(self, name):
|
||||
"""Declare option that can be used by this part"""
|
||||
global global_options
|
||||
|
|
@ -1226,11 +1255,11 @@ def startromimage(name):
|
|||
if (o):
|
||||
fatal("romimage %s previously defined" % name)
|
||||
curimage = romimage(name)
|
||||
dodir('/config', 'Config.lb')
|
||||
curimage.settargetdir(os.path.join(target_dir, name))
|
||||
#o = partobj(curimage, target_dir, 0, 'board', target_name)
|
||||
#curimage.setroot(o)
|
||||
setdict(romimages, name, curimage)
|
||||
dodir('/config', 'Config.lb')
|
||||
|
||||
def endromimage():
|
||||
global curimage
|
||||
|
|
@ -1258,7 +1287,7 @@ def mainboard():
|
|||
fulldir = os.path.join(srcdir, partdir)
|
||||
type_name = flatten_name(partdir)
|
||||
newpart = partobj(curimage, fulldir, partstack.tos(), 'mainboard', \
|
||||
type_name, 'Config.lb', 0, 'chip')
|
||||
type_name, 0, 0, 'chip')
|
||||
print "Configuring PART %s" % (type)
|
||||
partstack.push(newpart)
|
||||
#print " new PART tos is now %s\n" %partstack.tos().info()
|
||||
|
|
@ -1538,6 +1567,7 @@ parser Config:
|
|||
token PNP: 'pnp'
|
||||
token I2C: 'i2c'
|
||||
token APIC: 'apic'
|
||||
token APIC_CLUSTER: 'apic_cluster'
|
||||
token PCI_DOMAIN: 'pci_domain'
|
||||
token LINK: 'link'
|
||||
|
||||
|
|
@ -1641,10 +1671,10 @@ parser Config:
|
|||
|
||||
rule register<<C>>: REGISTER field '=' STR {{ if (C): addregister(field, STR) }}
|
||||
|
||||
rule enable: {{ val = 1 }}
|
||||
[ ( ON {{ val = 1 }}
|
||||
rule enable<<C>>: {{ val = 1 }}
|
||||
( ON {{ val = 1 }}
|
||||
| OFF {{ val = 0 }}
|
||||
) ] {{ return val }}
|
||||
) {{ if(C): partstack.tos().set_enabled(val) }}
|
||||
|
||||
rule resource<<C>>: {{ type = "" }}
|
||||
( IO {{ type = "IORESOURCE_IO" }}
|
||||
|
|
@ -1666,49 +1696,36 @@ parser Config:
|
|||
|
||||
HEX_NUM {{ slot = int(HEX_NUM,16) }}
|
||||
'.' HEX_NUM {{ function = int(HEX_NUM, 16) }}
|
||||
enable
|
||||
{{ if (C): partstack.tos().addpcipath(enable, 0, slot, function) }}
|
||||
resources<<C>>
|
||||
partend<<C>>
|
||||
{{ if (C): partstack.tos().addpcipath(slot, function) }}
|
||||
rule pci_domain<<C>>:
|
||||
PCI_DOMAIN {{ if (C): devicepart('pci_domain') }}
|
||||
HEX_NUM {{ pci_domain = int(HEX_NUM, 16) }}
|
||||
{{ if (C): partstack.tos().addpci_domainpath(pci_domain) }}
|
||||
|
||||
rule pnp<<C>>: PNP {{ if (C): devicepart('pnp') }}
|
||||
HEX_NUM {{ port = int(HEX_NUM,16) }}
|
||||
'.' HEX_NUM {{ device = int(HEX_NUM, 16) }}
|
||||
enable
|
||||
{{ if (C): partstack.tos().addpnppath(enable, port, device) }}
|
||||
resources<<C>>
|
||||
partend<<C>>
|
||||
|
||||
|
||||
{{ if (C): partstack.tos().addpnppath(port, device) }}
|
||||
|
||||
rule i2c<<C>>: I2C {{ if (C): devicepart('i2c') }}
|
||||
HEX_NUM {{ device = int(HEX_NUM, 16) }}
|
||||
enable
|
||||
{{ if (C): partstack.tos().addi2cpath(enable, device) }}
|
||||
resources<<C>>
|
||||
partend<<C>>
|
||||
{{ if (C): partstack.tos().addi2cpath(device) }}
|
||||
|
||||
rule apic<<C>>: APIC {{ if (C): devicepart('apic') }}
|
||||
HEX_NUM {{ apic_id = int(HEX_NUM, 16) }}
|
||||
enable
|
||||
{{ if (C): partstack.tos().addapicpath(enable, apic_id) }}
|
||||
resources<<C>>
|
||||
partend<<C>>
|
||||
|
||||
rule pci_domain<<C>>:
|
||||
PCI_DOMAIN {{ if (C): devicepart('pci_domain') }}
|
||||
HEX_NUM {{ pci_domain = int(HEX_NUM, 16) }}
|
||||
enable
|
||||
{{ if (C): partstack.tos().addpci_domainpath(enable, pci_domain) }}
|
||||
resources<<C>>
|
||||
partend<<C>>
|
||||
{{ if (C): partstack.tos().addapicpath(apic_id) }}
|
||||
|
||||
rule apic_cluster<<C>>: APIC_CLUSTER {{ if (C): devicepart('apic_cluster') }}
|
||||
HEX_NUM {{ cluster = int(HEX_NUM, 16) }}
|
||||
{{ if (C): partstack.tos().addapicpath(cluster) }}
|
||||
|
||||
rule dev_path<<C>>:
|
||||
pci<<C>> {{ return pci }}
|
||||
| pci_domain<<C>> {{ return pci_domain }}
|
||||
| pnp<<C>> {{ return pnp }}
|
||||
| i2c<<C>> {{ return i2c }}
|
||||
| apic<<C>> {{ return apic }}
|
||||
| pci_domain<<C>> {{ return pci_domain }}
|
||||
| apic_cluster<<C>> {{ return apic_cluster }}
|
||||
|
||||
rule prtval: expr {{ return str(expr) }}
|
||||
| STR {{ return STR }}
|
||||
|
|
@ -1723,7 +1740,10 @@ parser Config:
|
|||
|
||||
rule config<<C>>: CONFIG PATH {{ if (C): addconfig(PATH) }}
|
||||
|
||||
rule device<<C>>: DEVICE dev_path<<C>>
|
||||
rule device<<C>>: DEVICE dev_path<<C>>
|
||||
enable<<C>>
|
||||
resources<<C>>
|
||||
partend<<C>>
|
||||
|
||||
rule stmt<<C>>: arch<<C>> {{ return arch}}
|
||||
| addaction<<C>> {{ return addaction }}
|
||||
|
|
|
|||
Loading…
Reference in New Issue