lenovo/x60: native vga init: fix code style issues.
Change-Id: I054edffbb38b13559da10180fc2c6cd9929ba162 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3999 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -57,11 +57,7 @@ static unsigned int graphics;
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static unsigned short addrport;
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static unsigned short dataport;
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static unsigned int physbase;
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#if 0 //undefined reference
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extern int oprom_is_loaded;
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#else
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int oprom_is_loaded;
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#endif
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#define PGETBL_CTL 0x2020
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#define PGETBL_ENABLED 0x00000001
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@ -126,7 +122,8 @@ setgtt(int start, int end, unsigned long base, int inc)
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{
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int i;
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printk(BIOS_INFO, "%s(%d,%d,0x%08lx,%d);\n",__func__, start, end, base, inc);
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printk(BIOS_INFO, "%s(%d,%d,0x%08lx,%d);\n",
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__func__, start, end, base, inc);
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for (i = start; i < end; i++) {
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u32 word = base + i*inc;
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@ -150,7 +147,7 @@ int gtt_setup(unsigned int mmiobase)
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/* verify */
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if (read32(mmiobase + PGETBL_CTL) & PGETBL_ENABLED) {
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printk(BIOS_DEBUG, "gtt_setup is enabled!!!\n");
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printk(BIOS_DEBUG, "gtt_setup is enabled.\n");
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} else {
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printk(BIOS_DEBUG, "gtt_setup failed!!!\n");
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return 1;
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@ -188,10 +185,9 @@ static void palette(void)
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int i;
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unsigned long color = 0;
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for(i = 0; i < 256; i++, color += 0x010101){
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for (i = 0; i < 256; i++, color += 0x010101)
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io_i915_WRITE32(color, _LGC_PALETTE_A + (i<<2));
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}
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}
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int vbe_mode_info_valid(void);
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int vbe_mode_info_valid(void)
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@ -202,7 +198,8 @@ int vbe_mode_info_valid(void)
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void fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
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void fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
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{
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printk(BIOS_SPEW, "fill_lb_framebuffer: graphics is %p\n", (void *)graphics);
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printk(BIOS_SPEW, "fill_lb_framebuffer: graphics is %p\n",
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(void *)graphics);
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framebuffer->physical_address = graphics;
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framebuffer->x_resolution = 1024;
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framebuffer->y_resolution = 768;
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@ -231,7 +228,8 @@ static int run(int index)
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for (i = index, id = &iodefs[i]; id->op; i++, id++) {
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switch (id->op) {
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case M:
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if (verbose & vmsg) printk(BIOS_SPEW, "%ld: %s\n",
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if (verbose & vmsg)
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printk(BIOS_SPEW, "%ld: %s\n",
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globalmicroseconds(), id->msg);
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break;
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case P:
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@ -246,10 +244,11 @@ static int run(int index)
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/* they're going to be polling.
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* just do it 1000 times
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*/
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for (t = 0; t < 1000 && id->data != u; t++){
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for (t = 0; t < 1000 && id->data != u; t++)
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u = READ32(id->addr);
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}
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if (verbose & vspin) printk(BIOS_SPEW,
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if (verbose & vspin)
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printk(BIOS_SPEW,
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"%s: # loops %ld got %08lx want %08lx\n",
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regname(id->addr),
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t, u, id->data);
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@ -262,11 +261,15 @@ static int run(int index)
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if (verbose & vio)
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printk(BIOS_SPEW, "PCH_PP_CONTROL\n");
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switch (id->data & 0xf) {
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case 8: break;
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case 7: break;
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default: udelay(100000);
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case 8:
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break;
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case 7:
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break;
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default:
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udelay(100000);
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if (verbose & vio)
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printk(BIOS_SPEW, "U %d\n", 100000);
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printk(BIOS_SPEW, "U %d\n",
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100000);
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}
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}
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break;
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@ -284,7 +287,8 @@ static int run(int index)
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return i+1;
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break;
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default:
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printk(BIOS_SPEW, "BAD TABLE, opcode %d @ %d\n", id->op, i);
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printk(BIOS_SPEW, "BAD TABLE, opcode %d @ %d\n",
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id->op, i);
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return -1;
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}
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if (id->udelay)
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@ -311,13 +315,14 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
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dataport = addrport + 4;
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physbase = pphysbase;
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graphics = pgfx;
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printk(BIOS_SPEW, "i915lightup: graphics %p mmio %p"
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"addrport %04x physbase %08x\n",
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printk(BIOS_SPEW,
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"i915lightup: graphics %p mmio %p addrport %04x physbase %08x\n",
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(void *)graphics, mmio, addrport, physbase);
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globalstart = rdtscll();
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decode_edid((unsigned char *)&x60_edid_data, sizeof(x60_edid_data), &edid);
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decode_edid((unsigned char *)&x60_edid_data,
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sizeof(x60_edid_data), &edid);
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htotal = (edid.ha - 1) | ((edid.ha + edid.hbl - 1) << 16);
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printk(BIOS_SPEW, "I915_WRITE(HTOTAL(pipe), %08x)\n", htotal);
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@ -335,7 +340,8 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
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vblank = (edid.va - 1) | ((edid.va + edid.vbl - 1) << 16);
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printk(BIOS_SPEW, "I915_WRITE(VBLANK(pipe),0x%08x)\n", vblank);
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vsync = (edid.va + edid.vso - 1) |((edid.va + edid.vso + edid.vspw- 1) << 16);
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vsync = (edid.va + edid.vso - 1) |
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((edid.va + edid.vso + edid.vspw - 1) << 16);
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printk(BIOS_SPEW, "I915_WRITE(VSYNC(pipe),0x%08x)\n", vsync);
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printk(BIOS_SPEW, "Table has %d elements\n", niodefs);
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@ -84,4 +84,3 @@ u32 pack_aux(u32 *src, int src_bytes);
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void unpack_aux(u32 src, u32 *dst, int dst_bytes);
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int intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
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u32 *recv, int recv_size);
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@ -140,7 +140,8 @@ intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
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*/
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if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
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printk(BIOS_SPEW, "[000000.0] [drm:%s], ", __func__);
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printk(BIOS_SPEW, "dp_aux_ch receive error status 0x%08x\n", status);
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printk(BIOS_SPEW,
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"dp_aux_ch receive error status 0x%08x\n", status);
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return -1;
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}
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@ -164,4 +165,3 @@ intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
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return recv_bytes;
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}
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