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mb/google/brya/acpi: Remove NV_33 power rail from GC6 entry/exit sequences 

I misread my notes when writing the code for the GC6I/GC6O Methods, and
accidentally included NV_33 in the GC6 sequence, which is incorrect
(confirmed in the Hardware Design Guide). This patch removes the code
that brings NV_33 up and down during the GC6 sequences.

BUG=b:236676400
TEST=build

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Iaa6c5ef3d7b1edbe13257f99013ab0e4382bdbf5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65565
Reviewed-by: Robert Zieba <robertzieba@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Tim Wawrzynczak 2022-06-30 10:12:11 -06:00
parent 52ccd293d7
commit 21b187872e
1 changed files with 0 additions and 12 deletions
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12
src/mainboard/google/brya/acpi/power.asl
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@ -78,12 +78,6 @@ Method (GC6I, 0, Serialized)
/* Deassert EN_PCH_PPVAR_GPU_FBVDDQ (active-low) */
\_SB.PCI0.STXS (GPIO_FBVDD_PWR_EN)
/* Deassert EN_PP3300_GPU */
\_SB.PCI0.CTXS (GPIO_NV33_PWR_EN)
/* Wait for de-assertion of PG_PP3300_GPU */
GPPL (GPIO_NV33_PG, 0, 20)
GC6E = GC6_STATE_ENTERED
}
@ -92,12 +86,6 @@ Method (GC6O, 0, Serialized)
{
GC6E = GC6_STATE_TRANSITION
/* Assert EN_PP3300_GPU */
\_SB.PCI0.STXS (GPIO_NV33_PWR_EN)
/* Wait for assertion of PG_PP3300_GPU */
GPPL (GPIO_NV33_PG, 1, 20)
/* Deassert GPU_PERST_L */
\_SB.PCI0.CTXS (GPIO_GPU_PERST_L)