soc/intel/alderlake: add power limits for Alder Lake-M 282 SKU
There are two different types of 282 SKU available with TDP of 15W and 12W for Alder Lake-M SoC. This patch adds support for these TDP values for 282 SKU as per document 643782. BUG=None BRANCH=None TEST=Build FW and test on adlrvp board Change-Id: I553b2362b7bf811e6bf02fd9d68f78c2caeb7398 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
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@ -25,7 +25,8 @@ enum soc_intel_alderlake_power_limits {
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ADL_P_482_CORE,
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ADL_P_682_28W_CORE,
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ADL_P_682_45W_CORE,
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ADL_M_282_CORE,
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ADL_M_282_12W_CORE,
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ADL_M_282_15W_CORE,
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ADL_M_242_CORE,
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ADL_P_242_CORE,
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ADL_POWER_LIMITS_COUNT
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@ -34,6 +35,7 @@ enum soc_intel_alderlake_power_limits {
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/* TDP values for different SKUs */
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enum soc_intel_alderlake_cpu_tdps {
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TDP_9W = 9,
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TDP_12W = 12,
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TDP_15W = 15,
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TDP_28W = 28,
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TDP_45W = 45
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@ -50,7 +52,8 @@ static const struct {
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, ADL_P_482_CORE, TDP_28W },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_28W_CORE, TDP_28W },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_45W_CORE, TDP_45W },
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{ PCI_DEVICE_ID_INTEL_ADL_M_ID_1, ADL_M_282_CORE, TDP_15W },
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{ PCI_DEVICE_ID_INTEL_ADL_M_ID_1, ADL_M_282_12W_CORE, TDP_12W },
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{ PCI_DEVICE_ID_INTEL_ADL_M_ID_1, ADL_M_282_15W_CORE, TDP_15W },
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{ PCI_DEVICE_ID_INTEL_ADL_M_ID_2, ADL_M_242_CORE, TDP_9W },
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};
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@ -26,7 +26,12 @@ chip soc/intel/alderlake
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.tdp_pl4 = 215,
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}"
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register "power_limits_config[ADL_M_282_CORE]" = "{
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register "power_limits_config[ADL_M_282_12W_CORE]" = "{
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.tdp_pl1_override = 12,
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.tdp_pl2_override = 35,
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}"
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register "power_limits_config[ADL_M_282_15W_CORE]" = "{
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.tdp_pl1_override = 15,
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.tdp_pl2_override = 45,
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}"
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