From 21c5d43d723d5a52d5b4c0060a94d56bdf297424 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sat, 15 Jun 2019 18:23:29 +0200
Subject: [PATCH] sb/intel/common/spi.c: Add a pointer to the ich7 SPI
 registers

Change-Id: I7509dc2124ee7057af075c7d0607ec615b930fa3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/southbridge/intel/common/spi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 5a4b26fa66..f447515e58 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -92,7 +92,10 @@ struct ich_spi_controller {
 	uint32_t flcomp;
 	uint32_t hsfs;
 
-	struct ich9_spi_regs *ich9_spi;
+	union {
+		struct ich9_spi_regs *ich9_spi;
+		struct ich7_spi_regs *ich7_spi;
+	};
 	uint8_t *opmenu;
 	int menubytes;
 	uint16_t *preop;
@@ -283,6 +286,7 @@ void spi_init(void)
 	rcrb = (uint8_t *)(rcba & 0xffffc000);
 	if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) {
 		ich7_spi = (struct ich7_spi_regs *)(rcrb + 0x3020);
+		cntlr->ich7_spi = ich7_spi;
 		cntlr->opmenu = ich7_spi->opmenu;
 		cntlr->menubytes = sizeof(ich7_spi->opmenu);
 		cntlr->optype = &ich7_spi->optype;