From 21cad6c3fcfe98d5f569c852630eddb5c452662f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 4 Dec 2020 19:52:08 +0200 Subject: [PATCH] soc/amd: Fix X86_RESET_VECTOR location in comments MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I3e4b3cbed8abe3988d9f48c13d01400af75a4776 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48307 Reviewed-by: Furquan Shaikh Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 2 +- src/soc/amd/picasso/root_complex.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index bf101e33ee..e6de812b92 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -29,10 +29,10 @@ * | FSP-M | * | (FSP_M_SIZE) | * +--------------------------------+ FSP_M_ADDR - * | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10 * | romstage | * | (ROMSTAGE_SIZE) | * +--------------------------------+ ROMSTAGE_ADDR + * | | X86_RESET_VECTOR = BOOTBLOCK_ADDR + C_ENV_BOOTBLOCK_SIZE - 0x10 * | bootblock | * | (C_ENV_BOOTBLOCK_SIZE) | * +--------------------------------+ BOOTBLOCK_ADDR diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 72a0974897..90d2d4e8b0 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -75,10 +75,10 @@ struct dptc_input { * | FSP-M | * | (FSP_M_SIZE) | * +--------------------------------+ FSP_M_ADDR - * | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10 * | romstage | * | (ROMSTAGE_SIZE) | * +--------------------------------+ ROMSTAGE_ADDR + * | | X86_RESET_VECTOR = BOOTBLOCK_ADDR + C_ENV_BOOTBLOCK_SIZE - 0x10 * | bootblock | * | (C_ENV_BOOTBLOCK_SIZE) | * +--------------------------------+ BOOTBLOCK_ADDR