soc/amd/common: introduce SOC_AMD_COMMON_BLOCK_PCI_MMCONF

Add a Kconfig symbol for including the PCIe MMCONF setup function in the
build and select it when SOC_AMD_COMMON_BLOCK_PCI is selected and in the
southbridges call enable_pci_mmconf(), but don't select
SOC_AMD_COMMON_BLOCK_PCI.

Change-Id: I32de7450bff5b231442f9f2094a18ebe01874ee7
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47878
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/block/pci/Kconfig

@@ -1,6 +1,14 @@
 config SOC_AMD_COMMON_BLOCK_PCI
 	bool
 	default n
+	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
 	help
 	  This option builds functions used to program PCI interrupt
 	  routing, both PIC and APIC modes.
+
+config SOC_AMD_COMMON_BLOCK_PCI_MMCONF
+	bool
+	default n
+	help
+	  Selecting this option adds the AMD-common enable_pci_mmconf function
+	  to the build.

src/soc/amd/common/block/pci/Makefile.inc

@@ -1,8 +1,11 @@
 ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += amd_pci_util.c
 
-# FIXME: This gets added when CONFIG_SOC_AMD_COMMON is set, which is a bit unexpected.
+ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF),y)
+
 bootblock-y += amd_pci_mmconf.c
 verstage_x86-y += amd_pci_mmconf.c
 romstage-y += amd_pci_mmconf.c
 postcar-y += amd_pci_mmconf.c
 ramstage-y += amd_pci_mmconf.c
+
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF

src/southbridge/amd/agesa/hudson/Kconfig

@@ -16,6 +16,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select HAVE_CF9_RESET_PREPARE
 	select SOC_AMD_COMMON
 	select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
 
 config EHCI_BAR
 	hex

src/southbridge/amd/cimx/sb800/Kconfig

@@ -10,6 +10,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
 	select HAVE_CF9_RESET_PREPARE
 	select SOC_AMD_COMMON
 	select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
 
 if SOUTHBRIDGE_AMD_CIMX_SB800
 config ENABLE_IDE_COMBINED_MODE

src/southbridge/amd/pi/hudson/Kconfig

@@ -19,6 +19,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select HAVE_CF9_RESET_PREPARE
 	select SOC_AMD_COMMON
 	select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
 
 config EHCI_BAR
 	hex