AMD SB700 boards: Set Azalia configuration flags

The existing code for setting Azalia configuration assumes that
the configuration bits are contiguous within a single byte and
can be set using a byte copy addressed into the lowest 2-bit
subfield.

The fix in Family 14 defines a union that can be addressed as a
byte to overlay the bit fields.  Since the offset of the four
subfields is not necessarily fixed, change the code to initialize
each of the four subfields individually.

Change-Id: I1dff20bb8bd3e1bcd8b4e6b0537e20779d2a3521
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3544
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Bruce Griffith 2013-06-25 14:01:21 -06:00 committed by Stefan Reinauer
parent f9ba7bb4f9
commit 21d6fd9d78
6 changed files with 27 additions and 6 deletions

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@ -126,7 +126,10 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
/* Azalia HDA */
sb_config->AzaliaController = AZALIA_CONTROLLER;
sb_config->AzaliaPinCfg = AZALIA_PIN_CONFIG;
sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN_0;
sb_config->AzaliaSdin1 = AZALIA_SDIN_PIN_1;
sb_config->AzaliaSdin2 = AZALIA_SDIN_PIN_2;
sb_config->AzaliaSdin3 = AZALIA_SDIN_PIN_3;
sb_config->pAzaliaOemCodecTablePtr = NULL;
#ifndef __PRE_RAM__

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@ -192,7 +192,11 @@
*/
#ifndef AZALIA_SDIN_PIN
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
#define AZALIA_SDIN_PIN
#define AZALIA_SDIN_PIN_0 0x2
#define AZALIA_SDIN_PIN_1 0x2
#define AZALIA_SDIN_PIN_2 0x2
#define AZALIA_SDIN_PIN_3 0x0
#endif
/**

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@ -126,7 +126,10 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
/* Azalia HDA */
sb_config->AzaliaController = AZALIA_CONTROLLER;
sb_config->AzaliaPinCfg = AZALIA_PIN_CONFIG;
sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN_0;
sb_config->AzaliaSdin1 = AZALIA_SDIN_PIN_1;
sb_config->AzaliaSdin2 = AZALIA_SDIN_PIN_2;
sb_config->AzaliaSdin3 = AZALIA_SDIN_PIN_3;
sb_config->pAzaliaOemCodecTablePtr = NULL;
#ifndef __PRE_RAM__

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@ -192,7 +192,11 @@
*/
#ifndef AZALIA_SDIN_PIN
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
#define AZALIA_SDIN_PIN
#define AZALIA_SDIN_PIN_0 0x2
#define AZALIA_SDIN_PIN_1 0x2
#define AZALIA_SDIN_PIN_2 0x2
#define AZALIA_SDIN_PIN_3 0x0
#endif
/**

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@ -126,7 +126,10 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
/* Azalia HDA */
sb_config->AzaliaController = AZALIA_CONTROLLER;
sb_config->AzaliaPinCfg = AZALIA_PIN_CONFIG;
sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN_0;
sb_config->AzaliaSdin1 = AZALIA_SDIN_PIN_1;
sb_config->AzaliaSdin2 = AZALIA_SDIN_PIN_2;
sb_config->AzaliaSdin3 = AZALIA_SDIN_PIN_3;
sb_config->pAzaliaOemCodecTablePtr = NULL;
#ifndef __PRE_RAM__

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@ -192,7 +192,11 @@
*/
#ifndef AZALIA_SDIN_PIN
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A
#define AZALIA_SDIN_PIN
#define AZALIA_SDIN_PIN_0 0x2
#define AZALIA_SDIN_PIN_1 0x2
#define AZALIA_SDIN_PIN_2 0x2
#define AZALIA_SDIN_PIN_3 0x0
#endif
/**