AMD SB700 boards: Set Azalia configuration flags
The existing code for setting Azalia configuration assumes that the configuration bits are contiguous within a single byte and can be set using a byte copy addressed into the lowest 2-bit subfield. The fix in Family 14 defines a union that can be addressed as a byte to overlay the bit fields. Since the offset of the four subfields is not necessarily fixed, change the code to initialize each of the four subfields individually. Change-Id: I1dff20bb8bd3e1bcd8b4e6b0537e20779d2a3521 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/3544 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao@amd.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -126,7 +126,10 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
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/* Azalia HDA */
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sb_config->AzaliaController = AZALIA_CONTROLLER;
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sb_config->AzaliaPinCfg = AZALIA_PIN_CONFIG;
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sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
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sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN_0;
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sb_config->AzaliaSdin1 = AZALIA_SDIN_PIN_1;
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sb_config->AzaliaSdin2 = AZALIA_SDIN_PIN_2;
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sb_config->AzaliaSdin3 = AZALIA_SDIN_PIN_3;
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sb_config->pAzaliaOemCodecTablePtr = NULL;
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#ifndef __PRE_RAM__
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@ -192,7 +192,11 @@
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*/
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#ifndef AZALIA_SDIN_PIN
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//#define AZALIA_SDIN_PIN 0xAA
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#define AZALIA_SDIN_PIN 0x2A
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#define AZALIA_SDIN_PIN
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#define AZALIA_SDIN_PIN_0 0x2
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#define AZALIA_SDIN_PIN_1 0x2
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#define AZALIA_SDIN_PIN_2 0x2
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#define AZALIA_SDIN_PIN_3 0x0
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#endif
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/**
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@ -126,7 +126,10 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
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/* Azalia HDA */
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sb_config->AzaliaController = AZALIA_CONTROLLER;
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sb_config->AzaliaPinCfg = AZALIA_PIN_CONFIG;
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sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
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sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN_0;
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sb_config->AzaliaSdin1 = AZALIA_SDIN_PIN_1;
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sb_config->AzaliaSdin2 = AZALIA_SDIN_PIN_2;
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sb_config->AzaliaSdin3 = AZALIA_SDIN_PIN_3;
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sb_config->pAzaliaOemCodecTablePtr = NULL;
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#ifndef __PRE_RAM__
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@ -192,7 +192,11 @@
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*/
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#ifndef AZALIA_SDIN_PIN
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//#define AZALIA_SDIN_PIN 0xAA
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#define AZALIA_SDIN_PIN 0x2A
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#define AZALIA_SDIN_PIN
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#define AZALIA_SDIN_PIN_0 0x2
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#define AZALIA_SDIN_PIN_1 0x2
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#define AZALIA_SDIN_PIN_2 0x2
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#define AZALIA_SDIN_PIN_3 0x0
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#endif
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/**
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@ -126,7 +126,10 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
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/* Azalia HDA */
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sb_config->AzaliaController = AZALIA_CONTROLLER;
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sb_config->AzaliaPinCfg = AZALIA_PIN_CONFIG;
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sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN;
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sb_config->AzaliaSdin0 = AZALIA_SDIN_PIN_0;
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sb_config->AzaliaSdin1 = AZALIA_SDIN_PIN_1;
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sb_config->AzaliaSdin2 = AZALIA_SDIN_PIN_2;
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sb_config->AzaliaSdin3 = AZALIA_SDIN_PIN_3;
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sb_config->pAzaliaOemCodecTablePtr = NULL;
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#ifndef __PRE_RAM__
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@ -192,7 +192,11 @@
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*/
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#ifndef AZALIA_SDIN_PIN
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//#define AZALIA_SDIN_PIN 0xAA
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#define AZALIA_SDIN_PIN 0x2A
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#define AZALIA_SDIN_PIN
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#define AZALIA_SDIN_PIN_0 0x2
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#define AZALIA_SDIN_PIN_1 0x2
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#define AZALIA_SDIN_PIN_2 0x2
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#define AZALIA_SDIN_PIN_3 0x0
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#endif
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/**
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