src/lib/dimm_info_util.c: Add methods to convert from SMBIOS to SPD

AMD AGESA returns DIMM info in SMBIOS format. dimm_info expects the data
in SPD format. These methods will be used to update amd_late_init.c so
it sets the correct values.

BUG=b:65403853
TEST=Built and booted grunt. Methods are not called in this commit. So
they were tested with the later commit by verifying the output of
dmidecode.

Change-Id: Id9fa98e9aad83dfd0a86f45e18b3c312665dce9b
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/25412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/include/dimm_info_util.h

@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DIMM_INFO_UTIL_H_
+#define _DIMM_INFO_UTIL_H_
+
+#include <smbios.h>
+#include <stdint.h>
+
+/**
+ * Convert the SMBIOS bit widths into an SPD encoded width.
+ *
+ * Use this when setting dimm_info.bus_width if the raw SPD values are not
+ * available.
+ */
+uint8_t smbios_bus_width_to_spd_width(uint16_t total_width,
+				      uint16_t data_width);
+
+/**
+ * Convert the SMBIOS size values into the total number of MiB.
+ *
+ * Use this when setting dimm_info.dimm_size.
+ */
+uint32_t smbios_memory_size_to_mib(uint16_t memory_size,
+				   uint32_t extended_size);
+
+/**
+ * Convert the SMBIOS form factor to the SPD module type.
+ *
+ * Use this when setting dimm_info.mod_type.
+ */
+uint8_t
+smbios_form_factor_to_spd_mod_type(smbios_memory_form_factor form_factor);
+
+#endif

src/include/spd.h

@@ -289,7 +289,7 @@ enum spd_memory_type {
 #define RC62 62
 #define RC63 63
 
-/* Byte 20: DIMM type information */
+/* Byte 3: Module type information */
 #define SPD_UNDEFINED 0x00
 #define SPD_RDIMM 0x01
 #define SPD_UDIMM 0x02
@@ -300,4 +300,6 @@ enum spd_memory_type {
 #define SPD_MINI_RDIMM 0x10
 #define SPD_MINI_UDIMM 0x20
 
+#define SPD_ECC_8BIT (1<<3)
+
 #endif

src/lib/Makefile.inc

@@ -110,6 +110,7 @@ ramstage-y += memchr.c
 ramstage-y += memcmp.c
 ramstage-y += malloc.c
 smm-$(CONFIG_SMM_TSEG) += malloc.c
+ramstage-y += dimm_info_util.c
 ramstage-y += delay.c
 ramstage-y += fallback_boot.c
 ramstage-y += compute_ip_checksum.c

src/lib/dimm_info_util.c

@@ -0,0 +1,98 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dimm_info_util.h>
+#include <smbios.h>
+#include <spd.h>
+#include <console/console.h>
+
+uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, uint16_t data_width)
+{
+	uint8_t out;
+
+	/* Lookup table as defined in the JEDEC Standard. */
+	switch (data_width) {
+	case 64:
+		out = MEMORY_BUS_WIDTH_64;
+		break;
+	case 32:
+		out = MEMORY_BUS_WIDTH_32;
+		break;
+	case 16:
+		out = MEMORY_BUS_WIDTH_16;
+		break;
+	case 8:
+		out = MEMORY_BUS_WIDTH_8;
+		break;
+	default:
+		printk(BIOS_NOTICE, "Unknown memory size %hu", data_width);
+		/*
+		 * The SMBIOS spec says we should set 0xFFFF on an unknown
+		 * value, but we don't have a way of passing that signal via SPD
+		 * encoded values.
+		 */
+		out = MEMORY_BUS_WIDTH_8;
+		break;
+	}
+
+	uint16_t extension_bits = total_width - data_width;
+
+	switch (extension_bits) {
+	case 8:
+		out |= SPD_ECC_8BIT;
+		break;
+	case 0:
+		/* No extension bits */
+		break;
+	default:
+		printk(BIOS_NOTICE, "Unknown number of extension bits %hu",
+		       extension_bits);
+		break;
+	}
+
+	return out;
+}
+
+uint32_t smbios_memory_size_to_mib(uint16_t memory_size, uint32_t extended_size)
+{
+	/* Memory size is unknown */
+	if (memory_size == 0xFFFF)
+		return 0;
+	/* (32 GiB - 1 MiB) or greater is expressed in the extended size. */
+	else if (memory_size == 0x7FFF)
+		return extended_size;
+	/* When the MSB is flipped, the value is specified in kilobytes */
+	else if (memory_size & 0x8000)
+		return (memory_size ^ 0x8000) / KiB;
+	/* Value contains MiB */
+	else
+		return memory_size;
+}
+
+uint8_t
+smbios_form_factor_to_spd_mod_type(smbios_memory_form_factor form_factor)
+{
+	/* This switch reverses the switch in smbios.c */
+	switch (form_factor) {
+	case MEMORY_FORMFACTOR_DIMM:
+		return SPD_UDIMM;
+	case MEMORY_FORMFACTOR_RIMM:
+		return SPD_RDIMM;
+	case MEMORY_FORMFACTOR_SODIMM:
+		return SPD_SODIMM;
+	default:
+		return SPD_UNDEFINED;
+	}
+}