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t210: lp0_resume: set CAR2PMC_CPU_ACK_WIDTH to 0 

Like in cold boot path, need to set CAR2PMC_CPU_ACK_WIDTH to 0
in lp0 resume path.

BUG=chrome-os-partner:40741
BRANCH=None
TEST=Tested on Smaug; able to suspend/resume

Change-Id: Iffd7fa4d0266e2ec482ec17e5203ceff8afe748f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 052b649b1e6a4e34d621d710ee43aec7149ab8a8
Original-Change-Id: Icdf9879469485fb37b820b30c9663eda528ac013
Original-Signed-off-by: Yen Lin <yelin@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/286600
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Tom Warren <twarren@nvidia.com>
Reviewed-on: http://review.coreboot.org/11037
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Yen Lin 2015-07-16 10:23:34 -07:00 committed by Patrick Georgi
parent cbaf92782e
commit 21ee13c3ca
1 changed files with 10 additions and 0 deletions
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10
src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
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@ -146,6 +146,13 @@ enum {
CLK_ENB_CSITE = 0x1 << 9 CLK_ENB_CSITE = 0x1 << 9
}; };
static uint32_t *clk_rst_cpu_softrst_ctrl2_ptr =
(void *)(CLK_RST_BASE + 0x388);
enum {
CAR2PMC_CPU_ACK_WIDTH_SHIFT = 0,
CAR2PMC_CPU_ACK_WIDTH_MASK = 0xfff << CAR2PMC_CPU_ACK_WIDTH_SHIFT
};
static uint32_t *clk_rst_clk_enb_v_set_ptr = (void *)(CLK_RST_BASE + 0x440); static uint32_t *clk_rst_clk_enb_v_set_ptr = (void *)(CLK_RST_BASE + 0x440);
enum { enum {
CLK_ENB_CPUG = 0x1 << 0, CLK_ENB_CPUG = 0x1 << 0,
@ -787,6 +794,9 @@ void lp0_resume(void)
/* Disable PLLX since it isn't used in the kernel as CPU clk source. */ /* Disable PLLX since it isn't used in the kernel as CPU clk source. */
clrbits32(PLLX_ENABLE, clk_rst_pllx_base_ptr); clrbits32(PLLX_ENABLE, clk_rst_pllx_base_ptr);
/* Set CAR2PMC_CPU_ACK_WIDTH to 0 */
clrbits32(CAR2PMC_CPU_ACK_WIDTH_MASK, clk_rst_cpu_softrst_ctrl2_ptr);
/* Clear PMC_SCRATCH190 */ /* Clear PMC_SCRATCH190 */
clrbits32(1, pmc_scratch190_ptr); clrbits32(1, pmc_scratch190_ptr);